stm32f4xx_can.c 63 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_can.c
  4. * @author MCD Application Team
  5. * @version V1.8.1
  6. * @date 27-January-2022
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Controller area network (CAN) peripheral:
  9. * + Initialization and Configuration
  10. * + CAN Frames Transmission
  11. * + CAN Frames Reception
  12. * + Operation modes switch
  13. * + Error management
  14. * + Interrupts and flags
  15. *
  16. @verbatim
  17. ===============================================================================
  18. ##### How to use this driver #####
  19. ===============================================================================
  20. [..]
  21. (#) Enable the CAN controller interface clock using
  22. RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE); for CAN1
  23. and RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN2, ENABLE); for CAN2
  24. -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
  25. (#) CAN pins configuration
  26. (++) Enable the clock for the CAN GPIOs using the following function:
  27. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
  28. (++) Connect the involved CAN pins to AF9 using the following function
  29. GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_CANx);
  30. (++) Configure these CAN pins in alternate function mode by calling
  31. the function GPIO_Init();
  32. (#) Initialize and configure the CAN using CAN_Init() and
  33. CAN_FilterInit() functions.
  34. (#) Transmit the desired CAN frame using CAN_Transmit() function.
  35. (#) Check the transmission of a CAN frame using CAN_TransmitStatus()
  36. function.
  37. (#) Cancel the transmission of a CAN frame using CAN_CancelTransmit()
  38. function.
  39. (#) Receive a CAN frame using CAN_Receive() function.
  40. (#) Release the receive FIFOs using CAN_FIFORelease() function.
  41. (#) Return the number of pending received frames using
  42. CAN_MessagePending() function.
  43. (#) To control CAN events you can use one of the following two methods:
  44. (++) Check on CAN flags using the CAN_GetFlagStatus() function.
  45. (++) Use CAN interrupts through the function CAN_ITConfig() at
  46. initialization phase and CAN_GetITStatus() function into
  47. interrupt routines to check if the event has occurred or not.
  48. After checking on a flag you should clear it using CAN_ClearFlag()
  49. function. And after checking on an interrupt event you should
  50. clear it using CAN_ClearITPendingBit() function.
  51. @endverbatim
  52. ******************************************************************************
  53. * @attention
  54. *
  55. * Copyright (c) 2016 STMicroelectronics.
  56. * All rights reserved.
  57. *
  58. * This software is licensed under terms that can be found in the LICENSE file
  59. * in the root directory of this software component.
  60. * If no LICENSE file comes with this software, it is provided AS-IS.
  61. *
  62. ******************************************************************************
  63. */
  64. /* Includes ------------------------------------------------------------------*/
  65. #include "stm32f4xx_can.h"
  66. #include "stm32f4xx_rcc.h"
  67. /** @addtogroup STM32F4xx_StdPeriph_Driver
  68. * @{
  69. */
  70. /** @defgroup CAN
  71. * @brief CAN driver modules
  72. * @{
  73. */
  74. /* Private typedef -----------------------------------------------------------*/
  75. /* Private define ------------------------------------------------------------*/
  76. /* CAN Master Control Register bits */
  77. #define MCR_DBF ((uint32_t)0x00010000) /* software master reset */
  78. /* CAN Mailbox Transmit Request */
  79. #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */
  80. /* CAN Filter Master Register bits */
  81. #define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */
  82. /* Time out for INAK bit */
  83. #define INAK_TIMEOUT ((uint32_t)0x0000FFFF)
  84. /* Time out for SLAK bit */
  85. #define SLAK_TIMEOUT ((uint32_t)0x0000FFFF)
  86. /* Flags in TSR register */
  87. #define CAN_FLAGS_TSR ((uint32_t)0x08000000)
  88. /* Flags in RF1R register */
  89. #define CAN_FLAGS_RF1R ((uint32_t)0x04000000)
  90. /* Flags in RF0R register */
  91. #define CAN_FLAGS_RF0R ((uint32_t)0x02000000)
  92. /* Flags in MSR register */
  93. #define CAN_FLAGS_MSR ((uint32_t)0x01000000)
  94. /* Flags in ESR register */
  95. #define CAN_FLAGS_ESR ((uint32_t)0x00F00000)
  96. /* Mailboxes definition */
  97. #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
  98. #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
  99. #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
  100. #define CAN_MODE_MASK ((uint32_t) 0x00000003)
  101. /* Private macro -------------------------------------------------------------*/
  102. /* Private variables ---------------------------------------------------------*/
  103. /* Private function prototypes -----------------------------------------------*/
  104. /* Private functions ---------------------------------------------------------*/
  105. static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
  106. /** @defgroup CAN_Private_Functions
  107. * @{
  108. */
  109. /** @defgroup CAN_Group1 Initialization and Configuration functions
  110. * @brief Initialization and Configuration functions
  111. *
  112. @verbatim
  113. ===============================================================================
  114. ##### Initialization and Configuration functions #####
  115. ===============================================================================
  116. [..] This section provides functions allowing to
  117. (+) Initialize the CAN peripherals : Prescaler, operating mode, the maximum
  118. number of time quanta to perform resynchronization, the number of time
  119. quanta in Bit Segment 1 and 2 and many other modes.
  120. Refer to @ref CAN_InitTypeDef for more details.
  121. (+) Configures the CAN reception filter.
  122. (+) Select the start bank filter for slave CAN.
  123. (+) Enables or disables the Debug Freeze mode for CAN
  124. (+)Enables or disables the CAN Time Trigger Operation communication mode
  125. @endverbatim
  126. * @{
  127. */
  128. /**
  129. * @brief Deinitializes the CAN peripheral registers to their default reset values.
  130. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  131. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  132. * @retval None.
  133. */
  134. void CAN_DeInit(CAN_TypeDef* CANx)
  135. {
  136. /* Check the parameters */
  137. assert_param(IS_CAN_ALL_PERIPH(CANx));
  138. if (CANx == CAN1)
  139. {
  140. /* Enable CAN1 reset state */
  141. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
  142. /* Release CAN1 from reset state */
  143. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
  144. }
  145. #if defined(STM32F413_423xx)
  146. else if(CANx == CAN2)
  147. {
  148. /* Enable CAN2 reset state */
  149. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE);
  150. /* Release CAN2 from reset state */
  151. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE);
  152. }
  153. else /* CAN3 available only for STM32F413_423xx */
  154. {
  155. /* Enable CAN3 reset state */
  156. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN3, ENABLE);
  157. /* Release CAN3 from reset state */
  158. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN3, DISABLE);
  159. }
  160. #else
  161. else
  162. {
  163. /* Enable CAN2 reset state */
  164. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE);
  165. /* Release CAN2 from reset state */
  166. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE);
  167. }
  168. #endif /* STM32F413_423xx */
  169. }
  170. /**
  171. * @brief Initializes the CAN peripheral according to the specified
  172. * parameters in the CAN_InitStruct.
  173. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  174. * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that contains
  175. * the configuration information for the CAN peripheral.
  176. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  177. * @retval Constant indicates initialization succeed which will be
  178. * CAN_InitStatus_Failed or CAN_InitStatus_Success.
  179. */
  180. uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
  181. {
  182. uint8_t InitStatus = CAN_InitStatus_Failed;
  183. uint32_t wait_ack = 0x00000000;
  184. /* Check the parameters */
  185. assert_param(IS_CAN_ALL_PERIPH(CANx));
  186. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
  187. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
  188. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
  189. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
  190. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
  191. assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
  192. assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
  193. assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
  194. assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
  195. assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
  196. assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
  197. /* Exit from sleep mode */
  198. CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
  199. /* Request initialisation */
  200. CANx->MCR |= CAN_MCR_INRQ ;
  201. /* Wait the acknowledge */
  202. while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
  203. {
  204. wait_ack++;
  205. }
  206. /* Check acknowledge */
  207. if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  208. {
  209. InitStatus = CAN_InitStatus_Failed;
  210. }
  211. else
  212. {
  213. /* Set the time triggered communication mode */
  214. if (CAN_InitStruct->CAN_TTCM == ENABLE)
  215. {
  216. CANx->MCR |= CAN_MCR_TTCM;
  217. }
  218. else
  219. {
  220. CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
  221. }
  222. /* Set the automatic bus-off management */
  223. if (CAN_InitStruct->CAN_ABOM == ENABLE)
  224. {
  225. CANx->MCR |= CAN_MCR_ABOM;
  226. }
  227. else
  228. {
  229. CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
  230. }
  231. /* Set the automatic wake-up mode */
  232. if (CAN_InitStruct->CAN_AWUM == ENABLE)
  233. {
  234. CANx->MCR |= CAN_MCR_AWUM;
  235. }
  236. else
  237. {
  238. CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
  239. }
  240. /* Set the no automatic retransmission */
  241. if (CAN_InitStruct->CAN_NART == ENABLE)
  242. {
  243. CANx->MCR |= CAN_MCR_NART;
  244. }
  245. else
  246. {
  247. CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
  248. }
  249. /* Set the receive FIFO locked mode */
  250. if (CAN_InitStruct->CAN_RFLM == ENABLE)
  251. {
  252. CANx->MCR |= CAN_MCR_RFLM;
  253. }
  254. else
  255. {
  256. CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
  257. }
  258. /* Set the transmit FIFO priority */
  259. if (CAN_InitStruct->CAN_TXFP == ENABLE)
  260. {
  261. CANx->MCR |= CAN_MCR_TXFP;
  262. }
  263. else
  264. {
  265. CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
  266. }
  267. /* Set the bit timing register */
  268. CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
  269. ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
  270. ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
  271. ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
  272. ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
  273. /* Request leave initialisation */
  274. CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
  275. /* Wait the acknowledge */
  276. wait_ack = 0;
  277. while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
  278. {
  279. wait_ack++;
  280. }
  281. /* ...and check acknowledged */
  282. if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  283. {
  284. InitStatus = CAN_InitStatus_Failed;
  285. }
  286. else
  287. {
  288. InitStatus = CAN_InitStatus_Success ;
  289. }
  290. }
  291. /* At this step, return the status of initialization */
  292. return InitStatus;
  293. }
  294. #if defined(STM32F413_423xx)
  295. /**
  296. * @brief Configures the CAN reception filter according to the specified
  297. * parameters in the CAN_FilterInitStruct.
  298. * @param CANx: where x can be 1 or 3 to select the CAN peripheral.
  299. * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef structure that
  300. * contains the configuration information.
  301. * @retval None
  302. */
  303. void CAN_FilterInit(CAN_TypeDef* CANx, CAN_FilterInitTypeDef* CAN_FilterInitStruct)
  304. {
  305. uint32_t filter_number_bit_pos = 0;
  306. /* Check the parameters */
  307. assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
  308. assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
  309. assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
  310. assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
  311. assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
  312. filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
  313. /* Initialisation mode for the filter */
  314. CANx->FMR |= FMR_FINIT;
  315. /* Filter Deactivation */
  316. CANx->FA1R &= ~(uint32_t)filter_number_bit_pos;
  317. /* Filter Scale */
  318. if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
  319. {
  320. /* 16-bit scale for the filter */
  321. CANx->FS1R &= ~(uint32_t)filter_number_bit_pos;
  322. /* First 16-bit identifier and First 16-bit mask */
  323. /* Or First 16-bit identifier and Second 16-bit identifier */
  324. CANx->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
  325. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
  326. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
  327. /* Second 16-bit identifier and Second 16-bit mask */
  328. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  329. CANx->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
  330. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
  331. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
  332. }
  333. if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
  334. {
  335. /* 32-bit scale for the filter */
  336. CANx->FS1R |= filter_number_bit_pos;
  337. /* 32-bit identifier or First 32-bit identifier */
  338. CANx->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
  339. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
  340. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
  341. /* 32-bit mask or Second 32-bit identifier */
  342. CANx->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
  343. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
  344. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
  345. }
  346. /* Filter Mode */
  347. if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
  348. {
  349. /*Id/Mask mode for the filter*/
  350. CANx->FM1R &= ~(uint32_t)filter_number_bit_pos;
  351. }
  352. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  353. {
  354. /*Identifier list mode for the filter*/
  355. CANx->FM1R |= (uint32_t)filter_number_bit_pos;
  356. }
  357. /* Filter FIFO assignment */
  358. if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
  359. {
  360. /* FIFO 0 assignation for the filter */
  361. CANx->FFA1R &= ~(uint32_t)filter_number_bit_pos;
  362. }
  363. if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
  364. {
  365. /* FIFO 1 assignation for the filter */
  366. CANx->FFA1R |= (uint32_t)filter_number_bit_pos;
  367. }
  368. /* Filter activation */
  369. if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
  370. {
  371. CANx->FA1R |= filter_number_bit_pos;
  372. }
  373. /* Leave the initialisation mode for the filter */
  374. CANx->FMR &= ~FMR_FINIT;
  375. }
  376. #else
  377. /**
  378. * @brief Configures the CAN reception filter according to the specified
  379. * parameters in the CAN_FilterInitStruct.
  380. * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef structure that
  381. * contains the configuration information.
  382. * @retval None
  383. */
  384. void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
  385. {
  386. uint32_t filter_number_bit_pos = 0;
  387. /* Check the parameters */
  388. assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
  389. assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
  390. assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
  391. assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
  392. assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
  393. filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
  394. /* Initialisation mode for the filter */
  395. CAN1->FMR |= FMR_FINIT;
  396. /* Filter Deactivation */
  397. CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
  398. /* Filter Scale */
  399. if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
  400. {
  401. /* 16-bit scale for the filter */
  402. CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
  403. /* First 16-bit identifier and First 16-bit mask */
  404. /* Or First 16-bit identifier and Second 16-bit identifier */
  405. CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
  406. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
  407. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
  408. /* Second 16-bit identifier and Second 16-bit mask */
  409. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  410. CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
  411. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
  412. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
  413. }
  414. if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
  415. {
  416. /* 32-bit scale for the filter */
  417. CAN1->FS1R |= filter_number_bit_pos;
  418. /* 32-bit identifier or First 32-bit identifier */
  419. CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
  420. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
  421. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
  422. /* 32-bit mask or Second 32-bit identifier */
  423. CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
  424. ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
  425. (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
  426. }
  427. /* Filter Mode */
  428. if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
  429. {
  430. /*Id/Mask mode for the filter*/
  431. CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
  432. }
  433. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  434. {
  435. /*Identifier list mode for the filter*/
  436. CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
  437. }
  438. /* Filter FIFO assignment */
  439. if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
  440. {
  441. /* FIFO 0 assignation for the filter */
  442. CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
  443. }
  444. if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
  445. {
  446. /* FIFO 1 assignation for the filter */
  447. CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
  448. }
  449. /* Filter activation */
  450. if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
  451. {
  452. CAN1->FA1R |= filter_number_bit_pos;
  453. }
  454. /* Leave the initialisation mode for the filter */
  455. CAN1->FMR &= ~FMR_FINIT;
  456. }
  457. #endif /* STM32F413_423xx */
  458. /**
  459. * @brief Fills each CAN_InitStruct member with its default value.
  460. * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which ill be initialized.
  461. * @retval None
  462. */
  463. void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
  464. {
  465. /* Reset CAN init structure parameters values */
  466. /* Initialize the time triggered communication mode */
  467. CAN_InitStruct->CAN_TTCM = DISABLE;
  468. /* Initialize the automatic bus-off management */
  469. CAN_InitStruct->CAN_ABOM = DISABLE;
  470. /* Initialize the automatic wake-up mode */
  471. CAN_InitStruct->CAN_AWUM = DISABLE;
  472. /* Initialize the no automatic retransmission */
  473. CAN_InitStruct->CAN_NART = DISABLE;
  474. /* Initialize the receive FIFO locked mode */
  475. CAN_InitStruct->CAN_RFLM = DISABLE;
  476. /* Initialize the transmit FIFO priority */
  477. CAN_InitStruct->CAN_TXFP = DISABLE;
  478. /* Initialize the CAN_Mode member */
  479. CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
  480. /* Initialize the CAN_SJW member */
  481. CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
  482. /* Initialize the CAN_BS1 member */
  483. CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
  484. /* Initialize the CAN_BS2 member */
  485. CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
  486. /* Initialize the CAN_Prescaler member */
  487. CAN_InitStruct->CAN_Prescaler = 1;
  488. }
  489. #if defined(STM32F413_423xx)
  490. /**
  491. * @brief Select the start bank filter for slave CAN.
  492. * @param CANx: where x can be 1 or 3 to select the CAN peripheral.
  493. * @param CAN_BankNumber: Select the start slave bank filter from 1..27.
  494. * @retval None
  495. */
  496. void CAN_SlaveStartBank(CAN_TypeDef* CANx, uint8_t CAN_BankNumber)
  497. {
  498. /* Check the parameters */
  499. assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
  500. /* Enter Initialisation mode for the filter */
  501. CANx->FMR |= FMR_FINIT;
  502. /* Select the start slave bank */
  503. CANx->FMR &= (uint32_t)0xFFFFC0F1 ;
  504. CANx->FMR |= (uint32_t)(CAN_BankNumber)<<8;
  505. /* Leave Initialisation mode for the filter */
  506. CANx->FMR &= ~FMR_FINIT;
  507. }
  508. #else
  509. /**
  510. * @brief Select the start bank filter for slave CAN.
  511. * @param CAN_BankNumber: Select the start slave bank filter from 1..27.
  512. * @retval None
  513. */
  514. void CAN_SlaveStartBank(uint8_t CAN_BankNumber)
  515. {
  516. /* Check the parameters */
  517. assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
  518. /* Enter Initialisation mode for the filter */
  519. CAN1->FMR |= FMR_FINIT;
  520. /* Select the start slave bank */
  521. CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
  522. CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
  523. /* Leave Initialisation mode for the filter */
  524. CAN1->FMR &= ~FMR_FINIT;
  525. }
  526. #endif /* STM32F413_423xx */
  527. /**
  528. * @brief Enables or disables the DBG Freeze for CAN.
  529. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  530. * @param NewState: new state of the CAN peripheral.
  531. * This parameter can be: ENABLE (CAN reception/transmission is frozen
  532. * during debug. Reception FIFOs can still be accessed/controlled normally)
  533. * or DISABLE (CAN is working during debug).
  534. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  535. * @retval None
  536. */
  537. void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
  538. {
  539. /* Check the parameters */
  540. assert_param(IS_CAN_ALL_PERIPH(CANx));
  541. assert_param(IS_FUNCTIONAL_STATE(NewState));
  542. if (NewState != DISABLE)
  543. {
  544. /* Enable Debug Freeze */
  545. CANx->MCR |= MCR_DBF;
  546. }
  547. else
  548. {
  549. /* Disable Debug Freeze */
  550. CANx->MCR &= ~MCR_DBF;
  551. }
  552. }
  553. /**
  554. * @brief Enables or disables the CAN Time TriggerOperation communication mode.
  555. * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be
  556. * sent over the CAN bus.
  557. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  558. * @param NewState: Mode new state. This parameter can be: ENABLE or DISABLE.
  559. * When enabled, Time stamp (TIME[15:0]) value is sent in the last two
  560. * data bytes of the 8-byte message: TIME[7:0] in data byte 6 and TIME[15:8]
  561. * in data byte 7.
  562. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  563. * @retval None
  564. */
  565. void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState)
  566. {
  567. /* Check the parameters */
  568. assert_param(IS_CAN_ALL_PERIPH(CANx));
  569. assert_param(IS_FUNCTIONAL_STATE(NewState));
  570. if (NewState != DISABLE)
  571. {
  572. /* Enable the TTCM mode */
  573. CANx->MCR |= CAN_MCR_TTCM;
  574. /* Set TGT bits */
  575. CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT);
  576. CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT);
  577. CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT);
  578. }
  579. else
  580. {
  581. /* Disable the TTCM mode */
  582. CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM);
  583. /* Reset TGT bits */
  584. CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT);
  585. CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT);
  586. CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT);
  587. }
  588. }
  589. /**
  590. * @}
  591. */
  592. /** @defgroup CAN_Group2 CAN Frames Transmission functions
  593. * @brief CAN Frames Transmission functions
  594. *
  595. @verbatim
  596. ===============================================================================
  597. ##### CAN Frames Transmission functions #####
  598. ===============================================================================
  599. [..] This section provides functions allowing to
  600. (+) Initiate and transmit a CAN frame message (if there is an empty mailbox).
  601. (+) Check the transmission status of a CAN Frame
  602. (+) Cancel a transmit request
  603. @endverbatim
  604. * @{
  605. */
  606. /**
  607. * @brief Initiates and transmits a CAN frame message.
  608. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  609. * @param TxMessage: pointer to a structure which contains CAN Id, CAN DLC and CAN data.
  610. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  611. * @retval The number of the mailbox that is used for transmission or
  612. * CAN_TxStatus_NoMailBox if there is no empty mailbox.
  613. */
  614. uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
  615. {
  616. uint8_t transmit_mailbox = 0;
  617. /* Check the parameters */
  618. assert_param(IS_CAN_ALL_PERIPH(CANx));
  619. assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
  620. assert_param(IS_CAN_RTR(TxMessage->RTR));
  621. assert_param(IS_CAN_DLC(TxMessage->DLC));
  622. /* Select one empty transmit mailbox */
  623. if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  624. {
  625. transmit_mailbox = 0;
  626. }
  627. else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  628. {
  629. transmit_mailbox = 1;
  630. }
  631. else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  632. {
  633. transmit_mailbox = 2;
  634. }
  635. else
  636. {
  637. transmit_mailbox = CAN_TxStatus_NoMailBox;
  638. }
  639. if (transmit_mailbox != CAN_TxStatus_NoMailBox)
  640. {
  641. /* Set up the Id */
  642. CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
  643. if (TxMessage->IDE == CAN_Id_Standard)
  644. {
  645. assert_param(IS_CAN_STDID(TxMessage->StdId));
  646. CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \
  647. TxMessage->RTR);
  648. }
  649. else
  650. {
  651. assert_param(IS_CAN_EXTID(TxMessage->ExtId));
  652. CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \
  653. TxMessage->IDE | \
  654. TxMessage->RTR);
  655. }
  656. /* Set up the DLC */
  657. TxMessage->DLC &= (uint8_t)0x0000000F;
  658. CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  659. CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
  660. /* Set up the data field */
  661. CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) |
  662. ((uint32_t)TxMessage->Data[2] << 16) |
  663. ((uint32_t)TxMessage->Data[1] << 8) |
  664. ((uint32_t)TxMessage->Data[0]));
  665. CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) |
  666. ((uint32_t)TxMessage->Data[6] << 16) |
  667. ((uint32_t)TxMessage->Data[5] << 8) |
  668. ((uint32_t)TxMessage->Data[4]));
  669. /* Request transmission */
  670. CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
  671. }
  672. return transmit_mailbox;
  673. }
  674. /**
  675. * @brief Checks the transmission status of a CAN Frame.
  676. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  677. * @param TransmitMailbox: the number of the mailbox that is used for transmission.
  678. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  679. * @retval CAN_TxStatus_Ok if the CAN driver transmits the message,
  680. * CAN_TxStatus_Failed in an other case.
  681. */
  682. uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
  683. {
  684. uint32_t state = 0;
  685. /* Check the parameters */
  686. assert_param(IS_CAN_ALL_PERIPH(CANx));
  687. assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
  688. switch (TransmitMailbox)
  689. {
  690. case (CAN_TXMAILBOX_0):
  691. state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0);
  692. break;
  693. case (CAN_TXMAILBOX_1):
  694. state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1);
  695. break;
  696. case (CAN_TXMAILBOX_2):
  697. state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2);
  698. break;
  699. default:
  700. state = CAN_TxStatus_Failed;
  701. break;
  702. }
  703. switch (state)
  704. {
  705. /* transmit pending */
  706. case (0x0): state = CAN_TxStatus_Pending;
  707. break;
  708. /* transmit failed */
  709. case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed;
  710. break;
  711. case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed;
  712. break;
  713. case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed;
  714. break;
  715. /* transmit succeeded */
  716. case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok;
  717. break;
  718. case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok;
  719. break;
  720. case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok;
  721. break;
  722. default: state = CAN_TxStatus_Failed;
  723. break;
  724. }
  725. return (uint8_t) state;
  726. }
  727. /**
  728. * @brief Cancels a transmit request.
  729. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  730. * @param Mailbox: Mailbox number.
  731. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  732. * @retval None
  733. */
  734. void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
  735. {
  736. /* Check the parameters */
  737. assert_param(IS_CAN_ALL_PERIPH(CANx));
  738. assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
  739. /* abort transmission */
  740. switch (Mailbox)
  741. {
  742. case (CAN_TXMAILBOX_0): CANx->TSR = CAN_TSR_ABRQ0;
  743. break;
  744. case (CAN_TXMAILBOX_1): CANx->TSR = CAN_TSR_ABRQ1;
  745. break;
  746. case (CAN_TXMAILBOX_2): CANx->TSR = CAN_TSR_ABRQ2;
  747. break;
  748. default:
  749. break;
  750. }
  751. }
  752. /**
  753. * @}
  754. */
  755. /** @defgroup CAN_Group3 CAN Frames Reception functions
  756. * @brief CAN Frames Reception functions
  757. *
  758. @verbatim
  759. ===============================================================================
  760. ##### CAN Frames Reception functions #####
  761. ===============================================================================
  762. [..] This section provides functions allowing to
  763. (+) Receive a correct CAN frame
  764. (+) Release a specified receive FIFO (2 FIFOs are available)
  765. (+) Return the number of the pending received CAN frames
  766. @endverbatim
  767. * @{
  768. */
  769. /**
  770. * @brief Receives a correct CAN frame.
  771. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  772. * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  773. * @param RxMessage: pointer to a structure receive frame which contains CAN Id,
  774. * CAN DLC, CAN data and FMI number.
  775. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  776. * @retval None
  777. */
  778. void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
  779. {
  780. /* Check the parameters */
  781. assert_param(IS_CAN_ALL_PERIPH(CANx));
  782. assert_param(IS_CAN_FIFO(FIFONumber));
  783. /* Get the Id */
  784. RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
  785. if (RxMessage->IDE == CAN_Id_Standard)
  786. {
  787. RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
  788. }
  789. else
  790. {
  791. RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
  792. }
  793. RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
  794. /* Get the DLC */
  795. RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
  796. /* Get the FMI */
  797. RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
  798. /* Get the data field */
  799. RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
  800. RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
  801. RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
  802. RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
  803. RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
  804. RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
  805. RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
  806. RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
  807. /* Release the FIFO */
  808. /* Release FIFO0 */
  809. if (FIFONumber == CAN_FIFO0)
  810. {
  811. CANx->RF0R = CAN_RF0R_RFOM0;
  812. }
  813. /* Release FIFO1 */
  814. else /* FIFONumber == CAN_FIFO1 */
  815. {
  816. CANx->RF1R = CAN_RF1R_RFOM1;
  817. }
  818. }
  819. /**
  820. * @brief Releases the specified receive FIFO.
  821. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  822. * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
  823. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  824. * @retval None
  825. */
  826. void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
  827. {
  828. /* Check the parameters */
  829. assert_param(IS_CAN_ALL_PERIPH(CANx));
  830. assert_param(IS_CAN_FIFO(FIFONumber));
  831. /* Release FIFO0 */
  832. if (FIFONumber == CAN_FIFO0)
  833. {
  834. CANx->RF0R = CAN_RF0R_RFOM0;
  835. }
  836. /* Release FIFO1 */
  837. else /* FIFONumber == CAN_FIFO1 */
  838. {
  839. CANx->RF1R = CAN_RF1R_RFOM1;
  840. }
  841. }
  842. /**
  843. * @brief Returns the number of pending received messages.
  844. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  845. * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  846. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  847. * @retval NbMessage : which is the number of pending message.
  848. */
  849. uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
  850. {
  851. uint8_t message_pending=0;
  852. /* Check the parameters */
  853. assert_param(IS_CAN_ALL_PERIPH(CANx));
  854. assert_param(IS_CAN_FIFO(FIFONumber));
  855. if (FIFONumber == CAN_FIFO0)
  856. {
  857. message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
  858. }
  859. else if (FIFONumber == CAN_FIFO1)
  860. {
  861. message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
  862. }
  863. else
  864. {
  865. message_pending = 0;
  866. }
  867. return message_pending;
  868. }
  869. /**
  870. * @}
  871. */
  872. /** @defgroup CAN_Group4 CAN Operation modes functions
  873. * @brief CAN Operation modes functions
  874. *
  875. @verbatim
  876. ===============================================================================
  877. ##### CAN Operation modes functions #####
  878. ===============================================================================
  879. [..] This section provides functions allowing to select the CAN Operation modes
  880. (+) sleep mode
  881. (+) normal mode
  882. (+) initialization mode
  883. @endverbatim
  884. * @{
  885. */
  886. /**
  887. * @brief Selects the CAN Operation mode.
  888. * @param CAN_OperatingMode: CAN Operating Mode.
  889. * This parameter can be one of @ref CAN_OperatingMode_TypeDef enumeration.
  890. * @retval status of the requested mode which can be
  891. * - CAN_ModeStatus_Failed: CAN failed entering the specific mode
  892. * - CAN_ModeStatus_Success: CAN Succeed entering the specific mode
  893. */
  894. uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
  895. {
  896. uint8_t status = CAN_ModeStatus_Failed;
  897. /* Timeout for INAK or also for SLAK bits*/
  898. uint32_t timeout = INAK_TIMEOUT;
  899. /* Check the parameters */
  900. assert_param(IS_CAN_ALL_PERIPH(CANx));
  901. assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
  902. if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
  903. {
  904. /* Request initialisation */
  905. CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
  906. /* Wait the acknowledge */
  907. while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
  908. {
  909. timeout--;
  910. }
  911. if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
  912. {
  913. status = CAN_ModeStatus_Failed;
  914. }
  915. else
  916. {
  917. status = CAN_ModeStatus_Success;
  918. }
  919. }
  920. else if (CAN_OperatingMode == CAN_OperatingMode_Normal)
  921. {
  922. /* Request leave initialisation and sleep mode and enter Normal mode */
  923. CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
  924. /* Wait the acknowledge */
  925. while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
  926. {
  927. timeout--;
  928. }
  929. if ((CANx->MSR & CAN_MODE_MASK) != 0)
  930. {
  931. status = CAN_ModeStatus_Failed;
  932. }
  933. else
  934. {
  935. status = CAN_ModeStatus_Success;
  936. }
  937. }
  938. else if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
  939. {
  940. /* Request Sleep mode */
  941. CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  942. /* Wait the acknowledge */
  943. while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
  944. {
  945. timeout--;
  946. }
  947. if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
  948. {
  949. status = CAN_ModeStatus_Failed;
  950. }
  951. else
  952. {
  953. status = CAN_ModeStatus_Success;
  954. }
  955. }
  956. else
  957. {
  958. status = CAN_ModeStatus_Failed;
  959. }
  960. return (uint8_t) status;
  961. }
  962. /**
  963. * @brief Enters the Sleep (low power) mode.
  964. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  965. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  966. * @retval CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed otherwise.
  967. */
  968. uint8_t CAN_Sleep(CAN_TypeDef* CANx)
  969. {
  970. uint8_t sleepstatus = CAN_Sleep_Failed;
  971. /* Check the parameters */
  972. assert_param(IS_CAN_ALL_PERIPH(CANx));
  973. /* Request Sleep mode */
  974. CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  975. /* Sleep mode status */
  976. if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
  977. {
  978. /* Sleep mode not entered */
  979. sleepstatus = CAN_Sleep_Ok;
  980. }
  981. /* return sleep mode status */
  982. return (uint8_t)sleepstatus;
  983. }
  984. /**
  985. * @brief Wakes up the CAN peripheral from sleep mode .
  986. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  987. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  988. * @retval CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed otherwise.
  989. */
  990. uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
  991. {
  992. uint32_t wait_slak = SLAK_TIMEOUT;
  993. uint8_t wakeupstatus = CAN_WakeUp_Failed;
  994. /* Check the parameters */
  995. assert_param(IS_CAN_ALL_PERIPH(CANx));
  996. /* Wake up request */
  997. CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
  998. /* Sleep mode status */
  999. while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
  1000. {
  1001. wait_slak--;
  1002. }
  1003. if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
  1004. {
  1005. /* wake up done : Sleep mode exited */
  1006. wakeupstatus = CAN_WakeUp_Ok;
  1007. }
  1008. /* return wakeup status */
  1009. return (uint8_t)wakeupstatus;
  1010. }
  1011. /**
  1012. * @}
  1013. */
  1014. /** @defgroup CAN_Group5 CAN Bus Error management functions
  1015. * @brief CAN Bus Error management functions
  1016. *
  1017. @verbatim
  1018. ===============================================================================
  1019. ##### CAN Bus Error management functions #####
  1020. ===============================================================================
  1021. [..] This section provides functions allowing to
  1022. (+) Return the CANx's last error code (LEC)
  1023. (+) Return the CANx Receive Error Counter (REC)
  1024. (+) Return the LSB of the 9-bit CANx Transmit Error Counter(TEC).
  1025. -@- If TEC is greater than 255, The CAN is in bus-off state.
  1026. -@- if REC or TEC are greater than 96, an Error warning flag occurs.
  1027. -@- if REC or TEC are greater than 127, an Error Passive Flag occurs.
  1028. @endverbatim
  1029. * @{
  1030. */
  1031. /**
  1032. * @brief Returns the CANx's last error code (LEC).
  1033. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1034. * @retval Error code:
  1035. * - CAN_ERRORCODE_NoErr: No Error
  1036. * - CAN_ERRORCODE_StuffErr: Stuff Error
  1037. * - CAN_ERRORCODE_FormErr: Form Error
  1038. * - CAN_ERRORCODE_ACKErr : Acknowledgment Error
  1039. * - CAN_ERRORCODE_BitRecessiveErr: Bit Recessive Error
  1040. * - CAN_ERRORCODE_BitDominantErr: Bit Dominant Error
  1041. * - CAN_ERRORCODE_CRCErr: CRC Error
  1042. * - CAN_ERRORCODE_SoftwareSetErr: Software Set Error
  1043. */
  1044. uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
  1045. {
  1046. uint8_t errorcode=0;
  1047. /* Check the parameters */
  1048. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1049. /* Get the error code*/
  1050. errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
  1051. /* Return the error code*/
  1052. return errorcode;
  1053. }
  1054. /**
  1055. * @brief Returns the CANx Receive Error Counter (REC).
  1056. * @note In case of an error during reception, this counter is incremented
  1057. * by 1 or by 8 depending on the error condition as defined by the CAN
  1058. * standard. After every successful reception, the counter is
  1059. * decremented by 1 or reset to 120 if its value was higher than 128.
  1060. * When the counter value exceeds 127, the CAN controller enters the
  1061. * error passive state.
  1062. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1063. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1064. * @retval CAN Receive Error Counter.
  1065. */
  1066. uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
  1067. {
  1068. uint8_t counter=0;
  1069. /* Check the parameters */
  1070. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1071. /* Get the Receive Error Counter*/
  1072. counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
  1073. /* Return the Receive Error Counter*/
  1074. return counter;
  1075. }
  1076. /**
  1077. * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
  1078. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1079. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1080. * @retval LSB of the 9-bit CAN Transmit Error Counter.
  1081. */
  1082. uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
  1083. {
  1084. uint8_t counter=0;
  1085. /* Check the parameters */
  1086. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1087. /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
  1088. counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
  1089. /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
  1090. return counter;
  1091. }
  1092. /**
  1093. * @}
  1094. */
  1095. /** @defgroup CAN_Group6 Interrupts and flags management functions
  1096. * @brief Interrupts and flags management functions
  1097. *
  1098. @verbatim
  1099. ===============================================================================
  1100. ##### Interrupts and flags management functions #####
  1101. ===============================================================================
  1102. [..] This section provides functions allowing to configure the CAN Interrupts
  1103. and to get the status and clear flags and Interrupts pending bits.
  1104. The CAN provides 14 Interrupts sources and 15 Flags:
  1105. *** Flags ***
  1106. =============
  1107. [..] The 15 flags can be divided on 4 groups:
  1108. (+) Transmit Flags
  1109. (++) CAN_FLAG_RQCP0,
  1110. (++) CAN_FLAG_RQCP1,
  1111. (++) CAN_FLAG_RQCP2 : Request completed MailBoxes 0, 1 and 2 Flags
  1112. Set when the last request (transmit or abort)
  1113. has been performed.
  1114. (+) Receive Flags
  1115. (++) CAN_FLAG_FMP0,
  1116. (++) CAN_FLAG_FMP1 : FIFO 0 and 1 Message Pending Flags
  1117. set to signal that messages are pending in the receive
  1118. FIFO.
  1119. These Flags are cleared only by hardware.
  1120. (++) CAN_FLAG_FF0,
  1121. (++) CAN_FLAG_FF1 : FIFO 0 and 1 Full Flags
  1122. set when three messages are stored in the selected
  1123. FIFO.
  1124. (++) CAN_FLAG_FOV0
  1125. (++) CAN_FLAG_FOV1 : FIFO 0 and 1 Overrun Flags
  1126. set when a new message has been received and passed
  1127. the filter while the FIFO was full.
  1128. (+) Operating Mode Flags
  1129. (++) CAN_FLAG_WKU : Wake up Flag
  1130. set to signal that a SOF bit has been detected while
  1131. the CAN hardware was in Sleep mode.
  1132. (++) CAN_FLAG_SLAK : Sleep acknowledge Flag
  1133. Set to signal that the CAN has entered Sleep Mode.
  1134. (+) Error Flags
  1135. (++) CAN_FLAG_EWG : Error Warning Flag
  1136. Set when the warning limit has been reached (Receive
  1137. Error Counter or Transmit Error Counter greater than 96).
  1138. This Flag is cleared only by hardware.
  1139. (++) CAN_FLAG_EPV : Error Passive Flag
  1140. Set when the Error Passive limit has been reached
  1141. (Receive Error Counter or Transmit Error Counter
  1142. greater than 127).
  1143. This Flag is cleared only by hardware.
  1144. (++) CAN_FLAG_BOF : Bus-Off Flag
  1145. set when CAN enters the bus-off state. The bus-off
  1146. state is entered on TEC overflow, greater than 255.
  1147. This Flag is cleared only by hardware.
  1148. (++) CAN_FLAG_LEC : Last error code Flag
  1149. set If a message has been transferred (reception or
  1150. transmission) with error, and the error code is hold.
  1151. *** Interrupts ***
  1152. ==================
  1153. [..] The 14 interrupts can be divided on 4 groups:
  1154. (+) Transmit interrupt
  1155. (++) CAN_IT_TME : Transmit mailbox empty Interrupt
  1156. if enabled, this interrupt source is pending when
  1157. no transmit request are pending for Tx mailboxes.
  1158. (+) Receive Interrupts
  1159. (++) CAN_IT_FMP0,
  1160. (++) CAN_IT_FMP1 : FIFO 0 and FIFO1 message pending Interrupts
  1161. if enabled, these interrupt sources are pending
  1162. when messages are pending in the receive FIFO.
  1163. The corresponding interrupt pending bits are cleared
  1164. only by hardware.
  1165. (++) CAN_IT_FF0,
  1166. (++) CAN_IT_FF1 : FIFO 0 and FIFO1 full Interrupts
  1167. if enabled, these interrupt sources are pending
  1168. when three messages are stored in the selected FIFO.
  1169. (++) CAN_IT_FOV0,
  1170. (++) CAN_IT_FOV1 : FIFO 0 and FIFO1 overrun Interrupts
  1171. if enabled, these interrupt sources are pending
  1172. when a new message has been received and passed
  1173. the filter while the FIFO was full.
  1174. (+) Operating Mode Interrupts
  1175. (++) CAN_IT_WKU : Wake-up Interrupt
  1176. if enabled, this interrupt source is pending when
  1177. a SOF bit has been detected while the CAN hardware
  1178. was in Sleep mode.
  1179. (++) CAN_IT_SLK : Sleep acknowledge Interrupt
  1180. if enabled, this interrupt source is pending when
  1181. the CAN has entered Sleep Mode.
  1182. (+) Error Interrupts
  1183. (++) CAN_IT_EWG : Error warning Interrupt
  1184. if enabled, this interrupt source is pending when
  1185. the warning limit has been reached (Receive Error
  1186. Counter or Transmit Error Counter=96).
  1187. (++) CAN_IT_EPV : Error passive Interrupt
  1188. if enabled, this interrupt source is pending when
  1189. the Error Passive limit has been reached (Receive
  1190. Error Counter or Transmit Error Counter>127).
  1191. (++) CAN_IT_BOF : Bus-off Interrupt
  1192. if enabled, this interrupt source is pending when
  1193. CAN enters the bus-off state. The bus-off state is
  1194. entered on TEC overflow, greater than 255.
  1195. This Flag is cleared only by hardware.
  1196. (++) CAN_IT_LEC : Last error code Interrupt
  1197. if enabled, this interrupt source is pending when
  1198. a message has been transferred (reception or
  1199. transmission) with error, and the error code is hold.
  1200. (++) CAN_IT_ERR : Error Interrupt
  1201. if enabled, this interrupt source is pending when
  1202. an error condition is pending.
  1203. [..] Managing the CAN controller events :
  1204. The user should identify which mode will be used in his application to
  1205. manage the CAN controller events: Polling mode or Interrupt mode.
  1206. (#) In the Polling Mode it is advised to use the following functions:
  1207. (++) CAN_GetFlagStatus() : to check if flags events occur.
  1208. (++) CAN_ClearFlag() : to clear the flags events.
  1209. (#) In the Interrupt Mode it is advised to use the following functions:
  1210. (++) CAN_ITConfig() : to enable or disable the interrupt source.
  1211. (++) CAN_GetITStatus() : to check if Interrupt occurs.
  1212. (++) CAN_ClearITPendingBit() : to clear the Interrupt pending Bit
  1213. (corresponding Flag).
  1214. -@@- This function has no impact on CAN_IT_FMP0 and CAN_IT_FMP1 Interrupts
  1215. pending bits since there are cleared only by hardware.
  1216. @endverbatim
  1217. * @{
  1218. */
  1219. /**
  1220. * @brief Enables or disables the specified CANx interrupts.
  1221. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1222. * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
  1223. * This parameter can be:
  1224. * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
  1225. * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
  1226. * @arg CAN_IT_FF0: FIFO 0 full Interrupt
  1227. * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
  1228. * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
  1229. * @arg CAN_IT_FF1: FIFO 1 full Interrupt
  1230. * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
  1231. * @arg CAN_IT_WKU: Wake-up Interrupt
  1232. * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
  1233. * @arg CAN_IT_EWG: Error warning Interrupt
  1234. * @arg CAN_IT_EPV: Error passive Interrupt
  1235. * @arg CAN_IT_BOF: Bus-off Interrupt
  1236. * @arg CAN_IT_LEC: Last error code Interrupt
  1237. * @arg CAN_IT_ERR: Error Interrupt
  1238. * @param NewState: new state of the CAN interrupts.
  1239. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1240. * This parameter can be: ENABLE or DISABLE.
  1241. * @retval None
  1242. */
  1243. void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
  1244. {
  1245. /* Check the parameters */
  1246. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1247. assert_param(IS_CAN_IT(CAN_IT));
  1248. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1249. if (NewState != DISABLE)
  1250. {
  1251. /* Enable the selected CANx interrupt */
  1252. CANx->IER |= CAN_IT;
  1253. }
  1254. else
  1255. {
  1256. /* Disable the selected CANx interrupt */
  1257. CANx->IER &= ~CAN_IT;
  1258. }
  1259. }
  1260. /**
  1261. * @brief Checks whether the specified CAN flag is set or not.
  1262. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1263. * @param CAN_FLAG: specifies the flag to check.
  1264. * This parameter can be one of the following values:
  1265. * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
  1266. * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
  1267. * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
  1268. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  1269. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  1270. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  1271. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  1272. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  1273. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  1274. * @arg CAN_FLAG_WKU: Wake up Flag
  1275. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  1276. * @arg CAN_FLAG_EWG: Error Warning Flag
  1277. * @arg CAN_FLAG_EPV: Error Passive Flag
  1278. * @arg CAN_FLAG_BOF: Bus-Off Flag
  1279. * @arg CAN_FLAG_LEC: Last error code Flag
  1280. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1281. * @retval The new state of CAN_FLAG (SET or RESET).
  1282. */
  1283. FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
  1284. {
  1285. FlagStatus bitstatus = RESET;
  1286. /* Check the parameters */
  1287. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1288. assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
  1289. if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
  1290. {
  1291. /* Check the status of the specified CAN flag */
  1292. if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1293. {
  1294. /* CAN_FLAG is set */
  1295. bitstatus = SET;
  1296. }
  1297. else
  1298. {
  1299. /* CAN_FLAG is reset */
  1300. bitstatus = RESET;
  1301. }
  1302. }
  1303. else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
  1304. {
  1305. /* Check the status of the specified CAN flag */
  1306. if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1307. {
  1308. /* CAN_FLAG is set */
  1309. bitstatus = SET;
  1310. }
  1311. else
  1312. {
  1313. /* CAN_FLAG is reset */
  1314. bitstatus = RESET;
  1315. }
  1316. }
  1317. else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
  1318. {
  1319. /* Check the status of the specified CAN flag */
  1320. if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1321. {
  1322. /* CAN_FLAG is set */
  1323. bitstatus = SET;
  1324. }
  1325. else
  1326. {
  1327. /* CAN_FLAG is reset */
  1328. bitstatus = RESET;
  1329. }
  1330. }
  1331. else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
  1332. {
  1333. /* Check the status of the specified CAN flag */
  1334. if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1335. {
  1336. /* CAN_FLAG is set */
  1337. bitstatus = SET;
  1338. }
  1339. else
  1340. {
  1341. /* CAN_FLAG is reset */
  1342. bitstatus = RESET;
  1343. }
  1344. }
  1345. else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
  1346. {
  1347. /* Check the status of the specified CAN flag */
  1348. if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1349. {
  1350. /* CAN_FLAG is set */
  1351. bitstatus = SET;
  1352. }
  1353. else
  1354. {
  1355. /* CAN_FLAG is reset */
  1356. bitstatus = RESET;
  1357. }
  1358. }
  1359. /* Return the CAN_FLAG status */
  1360. return bitstatus;
  1361. }
  1362. /**
  1363. * @brief Clears the CAN's pending flags.
  1364. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1365. * @param CAN_FLAG: specifies the flag to clear.
  1366. * This parameter can be one of the following values:
  1367. * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
  1368. * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
  1369. * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
  1370. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  1371. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  1372. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  1373. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  1374. * @arg CAN_FLAG_WKU: Wake up Flag
  1375. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  1376. * @arg CAN_FLAG_LEC: Last error code Flag
  1377. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1378. * @retval None
  1379. */
  1380. void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
  1381. {
  1382. uint32_t flagtmp=0;
  1383. /* Check the parameters */
  1384. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1385. assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
  1386. if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
  1387. {
  1388. /* Clear the selected CAN flags */
  1389. CANx->ESR = (uint32_t)RESET;
  1390. }
  1391. else /* MSR or TSR or RF0R or RF1R */
  1392. {
  1393. flagtmp = CAN_FLAG & 0x000FFFFF;
  1394. if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
  1395. {
  1396. /* Receive Flags */
  1397. CANx->RF0R = (uint32_t)(flagtmp);
  1398. }
  1399. else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
  1400. {
  1401. /* Receive Flags */
  1402. CANx->RF1R = (uint32_t)(flagtmp);
  1403. }
  1404. else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
  1405. {
  1406. /* Transmit Flags */
  1407. CANx->TSR = (uint32_t)(flagtmp);
  1408. }
  1409. else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
  1410. {
  1411. /* Operating mode Flags */
  1412. CANx->MSR = (uint32_t)(flagtmp);
  1413. }
  1414. }
  1415. }
  1416. /**
  1417. * @brief Checks whether the specified CANx interrupt has occurred or not.
  1418. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1419. * @param CAN_IT: specifies the CAN interrupt source to check.
  1420. * This parameter can be one of the following values:
  1421. * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
  1422. * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
  1423. * @arg CAN_IT_FF0: FIFO 0 full Interrupt
  1424. * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
  1425. * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
  1426. * @arg CAN_IT_FF1: FIFO 1 full Interrupt
  1427. * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
  1428. * @arg CAN_IT_WKU: Wake-up Interrupt
  1429. * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
  1430. * @arg CAN_IT_EWG: Error warning Interrupt
  1431. * @arg CAN_IT_EPV: Error passive Interrupt
  1432. * @arg CAN_IT_BOF: Bus-off Interrupt
  1433. * @arg CAN_IT_LEC: Last error code Interrupt
  1434. * @arg CAN_IT_ERR: Error Interrupt
  1435. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1436. * @retval The current state of CAN_IT (SET or RESET).
  1437. */
  1438. ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
  1439. {
  1440. ITStatus itstatus = RESET;
  1441. /* Check the parameters */
  1442. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1443. assert_param(IS_CAN_IT(CAN_IT));
  1444. /* check the interrupt enable bit */
  1445. if((CANx->IER & CAN_IT) != RESET)
  1446. {
  1447. /* in case the Interrupt is enabled, .... */
  1448. switch (CAN_IT)
  1449. {
  1450. case CAN_IT_TME:
  1451. /* Check CAN_TSR_RQCPx bits */
  1452. itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);
  1453. break;
  1454. case CAN_IT_FMP0:
  1455. /* Check CAN_RF0R_FMP0 bit */
  1456. itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);
  1457. break;
  1458. case CAN_IT_FF0:
  1459. /* Check CAN_RF0R_FULL0 bit */
  1460. itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);
  1461. break;
  1462. case CAN_IT_FOV0:
  1463. /* Check CAN_RF0R_FOVR0 bit */
  1464. itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);
  1465. break;
  1466. case CAN_IT_FMP1:
  1467. /* Check CAN_RF1R_FMP1 bit */
  1468. itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);
  1469. break;
  1470. case CAN_IT_FF1:
  1471. /* Check CAN_RF1R_FULL1 bit */
  1472. itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);
  1473. break;
  1474. case CAN_IT_FOV1:
  1475. /* Check CAN_RF1R_FOVR1 bit */
  1476. itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);
  1477. break;
  1478. case CAN_IT_WKU:
  1479. /* Check CAN_MSR_WKUI bit */
  1480. itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);
  1481. break;
  1482. case CAN_IT_SLK:
  1483. /* Check CAN_MSR_SLAKI bit */
  1484. itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);
  1485. break;
  1486. case CAN_IT_EWG:
  1487. /* Check CAN_ESR_EWGF bit */
  1488. itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);
  1489. break;
  1490. case CAN_IT_EPV:
  1491. /* Check CAN_ESR_EPVF bit */
  1492. itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);
  1493. break;
  1494. case CAN_IT_BOF:
  1495. /* Check CAN_ESR_BOFF bit */
  1496. itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);
  1497. break;
  1498. case CAN_IT_LEC:
  1499. /* Check CAN_ESR_LEC bit */
  1500. itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);
  1501. break;
  1502. case CAN_IT_ERR:
  1503. /* Check CAN_MSR_ERRI bit */
  1504. itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI);
  1505. break;
  1506. default:
  1507. /* in case of error, return RESET */
  1508. itstatus = RESET;
  1509. break;
  1510. }
  1511. }
  1512. else
  1513. {
  1514. /* in case the Interrupt is not enabled, return RESET */
  1515. itstatus = RESET;
  1516. }
  1517. /* Return the CAN_IT status */
  1518. return itstatus;
  1519. }
  1520. /**
  1521. * @brief Clears the CANx's interrupt pending bits.
  1522. * @param CANx: where x can be 1,2 or 3 to select the CAN peripheral.
  1523. * @param CAN_IT: specifies the interrupt pending bit to clear.
  1524. * This parameter can be one of the following values:
  1525. * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
  1526. * @arg CAN_IT_FF0: FIFO 0 full Interrupt
  1527. * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
  1528. * @arg CAN_IT_FF1: FIFO 1 full Interrupt
  1529. * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
  1530. * @arg CAN_IT_WKU: Wake-up Interrupt
  1531. * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
  1532. * @arg CAN_IT_EWG: Error warning Interrupt
  1533. * @arg CAN_IT_EPV: Error passive Interrupt
  1534. * @arg CAN_IT_BOF: Bus-off Interrupt
  1535. * @arg CAN_IT_LEC: Last error code Interrupt
  1536. * @arg CAN_IT_ERR: Error Interrupt
  1537. * @note CAN3 peripheral is available only for STM32F413_423xx devices
  1538. * @retval None
  1539. */
  1540. void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
  1541. {
  1542. /* Check the parameters */
  1543. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1544. assert_param(IS_CAN_CLEAR_IT(CAN_IT));
  1545. switch (CAN_IT)
  1546. {
  1547. case CAN_IT_TME:
  1548. /* Clear CAN_TSR_RQCPx (rc_w1)*/
  1549. CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;
  1550. break;
  1551. case CAN_IT_FF0:
  1552. /* Clear CAN_RF0R_FULL0 (rc_w1)*/
  1553. CANx->RF0R = CAN_RF0R_FULL0;
  1554. break;
  1555. case CAN_IT_FOV0:
  1556. /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
  1557. CANx->RF0R = CAN_RF0R_FOVR0;
  1558. break;
  1559. case CAN_IT_FF1:
  1560. /* Clear CAN_RF1R_FULL1 (rc_w1)*/
  1561. CANx->RF1R = CAN_RF1R_FULL1;
  1562. break;
  1563. case CAN_IT_FOV1:
  1564. /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
  1565. CANx->RF1R = CAN_RF1R_FOVR1;
  1566. break;
  1567. case CAN_IT_WKU:
  1568. /* Clear CAN_MSR_WKUI (rc_w1)*/
  1569. CANx->MSR = CAN_MSR_WKUI;
  1570. break;
  1571. case CAN_IT_SLK:
  1572. /* Clear CAN_MSR_SLAKI (rc_w1)*/
  1573. CANx->MSR = CAN_MSR_SLAKI;
  1574. break;
  1575. case CAN_IT_EWG:
  1576. /* Clear CAN_MSR_ERRI (rc_w1) */
  1577. CANx->MSR = CAN_MSR_ERRI;
  1578. /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
  1579. break;
  1580. case CAN_IT_EPV:
  1581. /* Clear CAN_MSR_ERRI (rc_w1) */
  1582. CANx->MSR = CAN_MSR_ERRI;
  1583. /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
  1584. break;
  1585. case CAN_IT_BOF:
  1586. /* Clear CAN_MSR_ERRI (rc_w1) */
  1587. CANx->MSR = CAN_MSR_ERRI;
  1588. /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
  1589. break;
  1590. case CAN_IT_LEC:
  1591. /* Clear LEC bits */
  1592. CANx->ESR = RESET;
  1593. /* Clear CAN_MSR_ERRI (rc_w1) */
  1594. CANx->MSR = CAN_MSR_ERRI;
  1595. break;
  1596. case CAN_IT_ERR:
  1597. /*Clear LEC bits */
  1598. CANx->ESR = RESET;
  1599. /* Clear CAN_MSR_ERRI (rc_w1) */
  1600. CANx->MSR = CAN_MSR_ERRI;
  1601. /* @note BOFF, EPVF and EWGF Flags are cleared by hardware depending on the CAN Bus status*/
  1602. break;
  1603. default:
  1604. break;
  1605. }
  1606. }
  1607. /**
  1608. * @}
  1609. */
  1610. /**
  1611. * @brief Checks whether the CAN interrupt has occurred or not.
  1612. * @param CAN_Reg: specifies the CAN interrupt register to check.
  1613. * @param It_Bit: specifies the interrupt source bit to check.
  1614. * @retval The new state of the CAN Interrupt (SET or RESET).
  1615. */
  1616. static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
  1617. {
  1618. ITStatus pendingbitstatus = RESET;
  1619. if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
  1620. {
  1621. /* CAN_IT is set */
  1622. pendingbitstatus = SET;
  1623. }
  1624. else
  1625. {
  1626. /* CAN_IT is reset */
  1627. pendingbitstatus = RESET;
  1628. }
  1629. return pendingbitstatus;
  1630. }
  1631. /**
  1632. * @}
  1633. */
  1634. /**
  1635. * @}
  1636. */
  1637. /**
  1638. * @}
  1639. */