stm32f4xx_adc.c 65 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_adc.c
  4. * @author MCD Application Team
  5. * @version V1.8.1
  6. * @date 27-January-2022
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Analog to Digital Convertor (ADC) peripheral:
  9. * + Initialization and Configuration (in addition to ADC multi mode
  10. * selection)
  11. * + Analog Watchdog configuration
  12. * + Temperature Sensor & Vrefint (Voltage Reference internal) & VBAT
  13. * management
  14. * + Regular Channels Configuration
  15. * + Regular Channels DMA Configuration
  16. * + Injected channels Configuration
  17. * + Interrupts and flags management
  18. *
  19. @verbatim
  20. ===============================================================================
  21. ##### How to use this driver #####
  22. ===============================================================================
  23. [..]
  24. (#) Enable the ADC interface clock using
  25. RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADCx, ENABLE);
  26. (#) ADC pins configuration
  27. (++) Enable the clock for the ADC GPIOs using the following function:
  28. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
  29. (++) Configure these ADC pins in analog mode using GPIO_Init();
  30. (#) Configure the ADC Prescaler, conversion resolution and data
  31. alignment using the ADC_Init() function.
  32. (#) Activate the ADC peripheral using ADC_Cmd() function.
  33. *** Regular channels group configuration ***
  34. ============================================
  35. [..]
  36. (+) To configure the ADC regular channels group features, use
  37. ADC_Init() and ADC_RegularChannelConfig() functions.
  38. (+) To activate the continuous mode, use the ADC_continuousModeCmd()
  39. function.
  40. (+) To configurate and activate the Discontinuous mode, use the
  41. ADC_DiscModeChannelCountConfig() and ADC_DiscModeCmd() functions.
  42. (+) To read the ADC converted values, use the ADC_GetConversionValue()
  43. function.
  44. *** Multi mode ADCs Regular channels configuration ***
  45. ======================================================
  46. [..]
  47. (+) Refer to "Regular channels group configuration" description to
  48. configure the ADC1, ADC2 and ADC3 regular channels.
  49. (+) Select the Multi mode ADC regular channels features (dual or
  50. triple mode) using ADC_CommonInit() function and configure
  51. the DMA mode using ADC_MultiModeDMARequestAfterLastTransferCmd()
  52. functions.
  53. (+) Read the ADCs converted values using the
  54. ADC_GetMultiModeConversionValue() function.
  55. *** DMA for Regular channels group features configuration ***
  56. =============================================================
  57. [..]
  58. (+) To enable the DMA mode for regular channels group, use the
  59. ADC_DMACmd() function.
  60. (+) To enable the generation of DMA requests continuously at the end
  61. of the last DMA transfer, use the ADC_DMARequestAfterLastTransferCmd()
  62. function.
  63. *** Injected channels group configuration ***
  64. =============================================
  65. [..]
  66. (+) To configure the ADC Injected channels group features, use
  67. ADC_InjectedChannelConfig() and ADC_InjectedSequencerLengthConfig()
  68. functions.
  69. (+) To activate the continuous mode, use the ADC_continuousModeCmd()
  70. function.
  71. (+) To activate the Injected Discontinuous mode, use the
  72. ADC_InjectedDiscModeCmd() function.
  73. (+) To activate the AutoInjected mode, use the ADC_AutoInjectedConvCmd()
  74. function.
  75. (+) To read the ADC converted values, use the ADC_GetInjectedConversionValue()
  76. function.
  77. @endverbatim
  78. ******************************************************************************
  79. * @attention
  80. *
  81. * Copyright (c) 2016 STMicroelectronics.
  82. * All rights reserved.
  83. *
  84. * This software is licensed under terms that can be found in the LICENSE file
  85. * in the root directory of this software component.
  86. * If no LICENSE file comes with this software, it is provided AS-IS.
  87. *
  88. ******************************************************************************
  89. */
  90. /* Includes ------------------------------------------------------------------*/
  91. #include "stm32f4xx_adc.h"
  92. #include "stm32f4xx_rcc.h"
  93. /** @addtogroup STM32F4xx_StdPeriph_Driver
  94. * @{
  95. */
  96. /** @defgroup ADC
  97. * @brief ADC driver modules
  98. * @{
  99. */
  100. /* Private typedef -----------------------------------------------------------*/
  101. /* Private define ------------------------------------------------------------*/
  102. /* ADC DISCNUM mask */
  103. #define CR1_DISCNUM_RESET ((uint32_t)0xFFFF1FFF)
  104. /* ADC AWDCH mask */
  105. #define CR1_AWDCH_RESET ((uint32_t)0xFFFFFFE0)
  106. /* ADC Analog watchdog enable mode mask */
  107. #define CR1_AWDMode_RESET ((uint32_t)0xFF3FFDFF)
  108. /* CR1 register Mask */
  109. #define CR1_CLEAR_MASK ((uint32_t)0xFCFFFEFF)
  110. /* ADC EXTEN mask */
  111. #define CR2_EXTEN_RESET ((uint32_t)0xCFFFFFFF)
  112. /* ADC JEXTEN mask */
  113. #define CR2_JEXTEN_RESET ((uint32_t)0xFFCFFFFF)
  114. /* ADC JEXTSEL mask */
  115. #define CR2_JEXTSEL_RESET ((uint32_t)0xFFF0FFFF)
  116. /* CR2 register Mask */
  117. #define CR2_CLEAR_MASK ((uint32_t)0xC0FFF7FD)
  118. /* ADC SQx mask */
  119. #define SQR3_SQ_SET ((uint32_t)0x0000001F)
  120. #define SQR2_SQ_SET ((uint32_t)0x0000001F)
  121. #define SQR1_SQ_SET ((uint32_t)0x0000001F)
  122. /* ADC L Mask */
  123. #define SQR1_L_RESET ((uint32_t)0xFF0FFFFF)
  124. /* ADC JSQx mask */
  125. #define JSQR_JSQ_SET ((uint32_t)0x0000001F)
  126. /* ADC JL mask */
  127. #define JSQR_JL_SET ((uint32_t)0x00300000)
  128. #define JSQR_JL_RESET ((uint32_t)0xFFCFFFFF)
  129. /* ADC SMPx mask */
  130. #define SMPR1_SMP_SET ((uint32_t)0x00000007)
  131. #define SMPR2_SMP_SET ((uint32_t)0x00000007)
  132. /* ADC JDRx registers offset */
  133. #define JDR_OFFSET ((uint8_t)0x28)
  134. /* ADC CDR register base address */
  135. #define CDR_ADDRESS ((uint32_t)0x40012308)
  136. /* ADC CCR register Mask */
  137. #define CR_CLEAR_MASK ((uint32_t)0xFFFC30E0)
  138. /* Private macro -------------------------------------------------------------*/
  139. /* Private variables ---------------------------------------------------------*/
  140. /* Private function prototypes -----------------------------------------------*/
  141. /* Private functions ---------------------------------------------------------*/
  142. /** @defgroup ADC_Private_Functions
  143. * @{
  144. */
  145. /** @defgroup ADC_Group1 Initialization and Configuration functions
  146. * @brief Initialization and Configuration functions
  147. *
  148. @verbatim
  149. ===============================================================================
  150. ##### Initialization and Configuration functions #####
  151. ===============================================================================
  152. [..] This section provides functions allowing to:
  153. (+) Initialize and configure the ADC Prescaler
  154. (+) ADC Conversion Resolution (12bit..6bit)
  155. (+) Scan Conversion Mode (multichannel or one channel) for regular group
  156. (+) ADC Continuous Conversion Mode (Continuous or Single conversion) for
  157. regular group
  158. (+) External trigger Edge and source of regular group,
  159. (+) Converted data alignment (left or right)
  160. (+) The number of ADC conversions that will be done using the sequencer for
  161. regular channel group
  162. (+) Multi ADC mode selection
  163. (+) Direct memory access mode selection for multi ADC mode
  164. (+) Delay between 2 sampling phases (used in dual or triple interleaved modes)
  165. (+) Enable or disable the ADC peripheral
  166. @endverbatim
  167. * @{
  168. */
  169. /**
  170. * @brief Deinitializes all ADCs peripherals registers to their default reset
  171. * values.
  172. * @param None
  173. * @retval None
  174. */
  175. void ADC_DeInit(void)
  176. {
  177. /* Enable all ADCs reset state */
  178. RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, ENABLE);
  179. /* Release all ADCs from reset state */
  180. RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, DISABLE);
  181. }
  182. /**
  183. * @brief Initializes the ADCx peripheral according to the specified parameters
  184. * in the ADC_InitStruct.
  185. * @note This function is used to configure the global features of the ADC (
  186. * Resolution and Data Alignment), however, the rest of the configuration
  187. * parameters are specific to the regular channels group (scan mode
  188. * activation, continuous mode activation, External trigger source and
  189. * edge, number of conversion in the regular channels group sequencer).
  190. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  191. * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
  192. * the configuration information for the specified ADC peripheral.
  193. * @retval None
  194. */
  195. void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
  196. {
  197. uint32_t tmpreg1 = 0;
  198. uint8_t tmpreg2 = 0;
  199. /* Check the parameters */
  200. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  201. assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution));
  202. assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
  203. assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
  204. assert_param(IS_ADC_EXT_TRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigConvEdge));
  205. assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
  206. assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
  207. assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfConversion));
  208. /*---------------------------- ADCx CR1 Configuration -----------------*/
  209. /* Get the ADCx CR1 value */
  210. tmpreg1 = ADCx->CR1;
  211. /* Clear RES and SCAN bits */
  212. tmpreg1 &= CR1_CLEAR_MASK;
  213. /* Configure ADCx: scan conversion mode and resolution */
  214. /* Set SCAN bit according to ADC_ScanConvMode value */
  215. /* Set RES bit according to ADC_Resolution value */
  216. tmpreg1 |= (uint32_t)(((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8) | \
  217. ADC_InitStruct->ADC_Resolution);
  218. /* Write to ADCx CR1 */
  219. ADCx->CR1 = tmpreg1;
  220. /*---------------------------- ADCx CR2 Configuration -----------------*/
  221. /* Get the ADCx CR2 value */
  222. tmpreg1 = ADCx->CR2;
  223. /* Clear CONT, ALIGN, EXTEN and EXTSEL bits */
  224. tmpreg1 &= CR2_CLEAR_MASK;
  225. /* Configure ADCx: external trigger event and edge, data alignment and
  226. continuous conversion mode */
  227. /* Set ALIGN bit according to ADC_DataAlign value */
  228. /* Set EXTEN bits according to ADC_ExternalTrigConvEdge value */
  229. /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
  230. /* Set CONT bit according to ADC_ContinuousConvMode value */
  231. tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | \
  232. ADC_InitStruct->ADC_ExternalTrigConv |
  233. ADC_InitStruct->ADC_ExternalTrigConvEdge | \
  234. ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
  235. /* Write to ADCx CR2 */
  236. ADCx->CR2 = tmpreg1;
  237. /*---------------------------- ADCx SQR1 Configuration -----------------*/
  238. /* Get the ADCx SQR1 value */
  239. tmpreg1 = ADCx->SQR1;
  240. /* Clear L bits */
  241. tmpreg1 &= SQR1_L_RESET;
  242. /* Configure ADCx: regular channel sequence length */
  243. /* Set L bits according to ADC_NbrOfConversion value */
  244. tmpreg2 |= (uint8_t)(ADC_InitStruct->ADC_NbrOfConversion - (uint8_t)1);
  245. tmpreg1 |= ((uint32_t)tmpreg2 << 20);
  246. /* Write to ADCx SQR1 */
  247. ADCx->SQR1 = tmpreg1;
  248. }
  249. /**
  250. * @brief Fills each ADC_InitStruct member with its default value.
  251. * @note This function is used to initialize the global features of the ADC (
  252. * Resolution and Data Alignment), however, the rest of the configuration
  253. * parameters are specific to the regular channels group (scan mode
  254. * activation, continuous mode activation, External trigger source and
  255. * edge, number of conversion in the regular channels group sequencer).
  256. * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure which will
  257. * be initialized.
  258. * @retval None
  259. */
  260. void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
  261. {
  262. /* Initialize the ADC_Mode member */
  263. ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;
  264. /* initialize the ADC_ScanConvMode member */
  265. ADC_InitStruct->ADC_ScanConvMode = DISABLE;
  266. /* Initialize the ADC_ContinuousConvMode member */
  267. ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
  268. /* Initialize the ADC_ExternalTrigConvEdge member */
  269. ADC_InitStruct->ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
  270. /* Initialize the ADC_ExternalTrigConv member */
  271. ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
  272. /* Initialize the ADC_DataAlign member */
  273. ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
  274. /* Initialize the ADC_NbrOfConversion member */
  275. ADC_InitStruct->ADC_NbrOfConversion = 1;
  276. }
  277. /**
  278. * @brief Initializes the ADCs peripherals according to the specified parameters
  279. * in the ADC_CommonInitStruct.
  280. * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure
  281. * that contains the configuration information for All ADCs peripherals.
  282. * @retval None
  283. */
  284. void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
  285. {
  286. uint32_t tmpreg1 = 0;
  287. /* Check the parameters */
  288. assert_param(IS_ADC_MODE(ADC_CommonInitStruct->ADC_Mode));
  289. assert_param(IS_ADC_PRESCALER(ADC_CommonInitStruct->ADC_Prescaler));
  290. assert_param(IS_ADC_DMA_ACCESS_MODE(ADC_CommonInitStruct->ADC_DMAAccessMode));
  291. assert_param(IS_ADC_SAMPLING_DELAY(ADC_CommonInitStruct->ADC_TwoSamplingDelay));
  292. /*---------------------------- ADC CCR Configuration -----------------*/
  293. /* Get the ADC CCR value */
  294. tmpreg1 = ADC->CCR;
  295. /* Clear MULTI, DELAY, DMA and ADCPRE bits */
  296. tmpreg1 &= CR_CLEAR_MASK;
  297. /* Configure ADCx: Multi mode, Delay between two sampling time, ADC prescaler,
  298. and DMA access mode for multimode */
  299. /* Set MULTI bits according to ADC_Mode value */
  300. /* Set ADCPRE bits according to ADC_Prescaler value */
  301. /* Set DMA bits according to ADC_DMAAccessMode value */
  302. /* Set DELAY bits according to ADC_TwoSamplingDelay value */
  303. tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode |
  304. ADC_CommonInitStruct->ADC_Prescaler |
  305. ADC_CommonInitStruct->ADC_DMAAccessMode |
  306. ADC_CommonInitStruct->ADC_TwoSamplingDelay);
  307. /* Write to ADC CCR */
  308. ADC->CCR = tmpreg1;
  309. }
  310. /**
  311. * @brief Fills each ADC_CommonInitStruct member with its default value.
  312. * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure
  313. * which will be initialized.
  314. * @retval None
  315. */
  316. void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
  317. {
  318. /* Initialize the ADC_Mode member */
  319. ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent;
  320. /* initialize the ADC_Prescaler member */
  321. ADC_CommonInitStruct->ADC_Prescaler = ADC_Prescaler_Div2;
  322. /* Initialize the ADC_DMAAccessMode member */
  323. ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
  324. /* Initialize the ADC_TwoSamplingDelay member */
  325. ADC_CommonInitStruct->ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
  326. }
  327. /**
  328. * @brief Enables or disables the specified ADC peripheral.
  329. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  330. * @param NewState: new state of the ADCx peripheral.
  331. * This parameter can be: ENABLE or DISABLE.
  332. * @retval None
  333. */
  334. void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  335. {
  336. /* Check the parameters */
  337. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  338. assert_param(IS_FUNCTIONAL_STATE(NewState));
  339. if (NewState != DISABLE)
  340. {
  341. /* Set the ADON bit to wake up the ADC from power down mode */
  342. ADCx->CR2 |= (uint32_t)ADC_CR2_ADON;
  343. }
  344. else
  345. {
  346. /* Disable the selected ADC peripheral */
  347. ADCx->CR2 &= (uint32_t)(~ADC_CR2_ADON);
  348. }
  349. }
  350. /**
  351. * @}
  352. */
  353. /** @defgroup ADC_Group2 Analog Watchdog configuration functions
  354. * @brief Analog Watchdog configuration functions
  355. *
  356. @verbatim
  357. ===============================================================================
  358. ##### Analog Watchdog configuration functions #####
  359. ===============================================================================
  360. [..] This section provides functions allowing to configure the Analog Watchdog
  361. (AWD) feature in the ADC.
  362. [..] A typical configuration Analog Watchdog is done following these steps :
  363. (#) the ADC guarded channel(s) is (are) selected using the
  364. ADC_AnalogWatchdogSingleChannelConfig() function.
  365. (#) The Analog watchdog lower and higher threshold are configured using the
  366. ADC_AnalogWatchdogThresholdsConfig() function.
  367. (#) The Analog watchdog is enabled and configured to enable the check, on one
  368. or more channels, using the ADC_AnalogWatchdogCmd() function.
  369. @endverbatim
  370. * @{
  371. */
  372. /**
  373. * @brief Enables or disables the analog watchdog on single/all regular or
  374. * injected channels
  375. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  376. * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration.
  377. * This parameter can be one of the following values:
  378. * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
  379. * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
  380. * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
  381. * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel
  382. * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel
  383. * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
  384. * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
  385. * @retval None
  386. */
  387. void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
  388. {
  389. uint32_t tmpreg = 0;
  390. /* Check the parameters */
  391. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  392. assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
  393. /* Get the old register value */
  394. tmpreg = ADCx->CR1;
  395. /* Clear AWDEN, JAWDEN and AWDSGL bits */
  396. tmpreg &= CR1_AWDMode_RESET;
  397. /* Set the analog watchdog enable mode */
  398. tmpreg |= ADC_AnalogWatchdog;
  399. /* Store the new register value */
  400. ADCx->CR1 = tmpreg;
  401. }
  402. /**
  403. * @brief Configures the high and low thresholds of the analog watchdog.
  404. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  405. * @param HighThreshold: the ADC analog watchdog High threshold value.
  406. * This parameter must be a 12-bit value.
  407. * @param LowThreshold: the ADC analog watchdog Low threshold value.
  408. * This parameter must be a 12-bit value.
  409. * @retval None
  410. */
  411. void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
  412. uint16_t LowThreshold)
  413. {
  414. /* Check the parameters */
  415. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  416. assert_param(IS_ADC_THRESHOLD(HighThreshold));
  417. assert_param(IS_ADC_THRESHOLD(LowThreshold));
  418. /* Set the ADCx high threshold */
  419. ADCx->HTR = HighThreshold;
  420. /* Set the ADCx low threshold */
  421. ADCx->LTR = LowThreshold;
  422. }
  423. /**
  424. * @brief Configures the analog watchdog guarded single channel
  425. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  426. * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
  427. * This parameter can be one of the following values:
  428. * @arg ADC_Channel_0: ADC Channel0 selected
  429. * @arg ADC_Channel_1: ADC Channel1 selected
  430. * @arg ADC_Channel_2: ADC Channel2 selected
  431. * @arg ADC_Channel_3: ADC Channel3 selected
  432. * @arg ADC_Channel_4: ADC Channel4 selected
  433. * @arg ADC_Channel_5: ADC Channel5 selected
  434. * @arg ADC_Channel_6: ADC Channel6 selected
  435. * @arg ADC_Channel_7: ADC Channel7 selected
  436. * @arg ADC_Channel_8: ADC Channel8 selected
  437. * @arg ADC_Channel_9: ADC Channel9 selected
  438. * @arg ADC_Channel_10: ADC Channel10 selected
  439. * @arg ADC_Channel_11: ADC Channel11 selected
  440. * @arg ADC_Channel_12: ADC Channel12 selected
  441. * @arg ADC_Channel_13: ADC Channel13 selected
  442. * @arg ADC_Channel_14: ADC Channel14 selected
  443. * @arg ADC_Channel_15: ADC Channel15 selected
  444. * @arg ADC_Channel_16: ADC Channel16 selected
  445. * @arg ADC_Channel_17: ADC Channel17 selected
  446. * @arg ADC_Channel_18: ADC Channel18 selected
  447. * @retval None
  448. */
  449. void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
  450. {
  451. uint32_t tmpreg = 0;
  452. /* Check the parameters */
  453. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  454. assert_param(IS_ADC_CHANNEL(ADC_Channel));
  455. /* Get the old register value */
  456. tmpreg = ADCx->CR1;
  457. /* Clear the Analog watchdog channel select bits */
  458. tmpreg &= CR1_AWDCH_RESET;
  459. /* Set the Analog watchdog channel */
  460. tmpreg |= ADC_Channel;
  461. /* Store the new register value */
  462. ADCx->CR1 = tmpreg;
  463. }
  464. /**
  465. * @}
  466. */
  467. /** @defgroup ADC_Group3 Temperature Sensor, Vrefint (Voltage Reference internal)
  468. * and VBAT (Voltage BATtery) management functions
  469. * @brief Temperature Sensor, Vrefint and VBAT management functions
  470. *
  471. @verbatim
  472. ===============================================================================
  473. ##### Temperature Sensor, Vrefint and VBAT management functions #####
  474. ===============================================================================
  475. [..] This section provides functions allowing to enable/ disable the internal
  476. connections between the ADC and the Temperature Sensor, the Vrefint and
  477. the Vbat sources.
  478. [..] A typical configuration to get the Temperature sensor and Vrefint channels
  479. voltages is done following these steps :
  480. (#) Enable the internal connection of Temperature sensor and Vrefint sources
  481. with the ADC channels using ADC_TempSensorVrefintCmd() function.
  482. (#) Select the ADC_Channel_TempSensor and/or ADC_Channel_Vrefint using
  483. ADC_RegularChannelConfig() or ADC_InjectedChannelConfig() functions
  484. (#) Get the voltage values, using ADC_GetConversionValue() or
  485. ADC_GetInjectedConversionValue().
  486. [..] A typical configuration to get the VBAT channel voltage is done following
  487. these steps :
  488. (#) Enable the internal connection of VBAT source with the ADC channel using
  489. ADC_VBATCmd() function.
  490. (#) Select the ADC_Channel_Vbat using ADC_RegularChannelConfig() or
  491. ADC_InjectedChannelConfig() functions
  492. (#) Get the voltage value, using ADC_GetConversionValue() or
  493. ADC_GetInjectedConversionValue().
  494. @endverbatim
  495. * @{
  496. */
  497. /**
  498. * @brief Enables or disables the temperature sensor and Vrefint channels.
  499. * @param NewState: new state of the temperature sensor and Vrefint channels.
  500. * This parameter can be: ENABLE or DISABLE.
  501. * @retval None
  502. */
  503. void ADC_TempSensorVrefintCmd(FunctionalState NewState)
  504. {
  505. /* Check the parameters */
  506. assert_param(IS_FUNCTIONAL_STATE(NewState));
  507. if (NewState != DISABLE)
  508. {
  509. /* Enable the temperature sensor and Vrefint channel*/
  510. ADC->CCR |= (uint32_t)ADC_CCR_TSVREFE;
  511. }
  512. else
  513. {
  514. /* Disable the temperature sensor and Vrefint channel*/
  515. ADC->CCR &= (uint32_t)(~ADC_CCR_TSVREFE);
  516. }
  517. }
  518. /**
  519. * @brief Enables or disables the VBAT (Voltage Battery) channel.
  520. *
  521. * @note the Battery voltage measured is equal to VBAT/2 on STM32F40xx and
  522. * STM32F41xx devices and equal to VBAT/4 on STM32F42xx and STM32F43xx devices
  523. *
  524. * @param NewState: new state of the VBAT channel.
  525. * This parameter can be: ENABLE or DISABLE.
  526. * @retval None
  527. */
  528. void ADC_VBATCmd(FunctionalState NewState)
  529. {
  530. /* Check the parameters */
  531. assert_param(IS_FUNCTIONAL_STATE(NewState));
  532. if (NewState != DISABLE)
  533. {
  534. /* Enable the VBAT channel*/
  535. ADC->CCR |= (uint32_t)ADC_CCR_VBATE;
  536. }
  537. else
  538. {
  539. /* Disable the VBAT channel*/
  540. ADC->CCR &= (uint32_t)(~ADC_CCR_VBATE);
  541. }
  542. }
  543. /**
  544. * @}
  545. */
  546. /** @defgroup ADC_Group4 Regular Channels Configuration functions
  547. * @brief Regular Channels Configuration functions
  548. *
  549. @verbatim
  550. ===============================================================================
  551. ##### Regular Channels Configuration functions #####
  552. ===============================================================================
  553. [..] This section provides functions allowing to manage the ADC's regular channels,
  554. it is composed of 2 sub sections :
  555. (#) Configuration and management functions for regular channels: This subsection
  556. provides functions allowing to configure the ADC regular channels :
  557. (++) Configure the rank in the regular group sequencer for each channel
  558. (++) Configure the sampling time for each channel
  559. (++) select the conversion Trigger for regular channels
  560. (++) select the desired EOC event behavior configuration
  561. (++) Activate the continuous Mode (*)
  562. (++) Activate the Discontinuous Mode
  563. -@@- Please Note that the following features for regular channels
  564. are configured using the ADC_Init() function :
  565. (+@@) scan mode activation
  566. (+@@) continuous mode activation (**)
  567. (+@@) External trigger source
  568. (+@@) External trigger edge
  569. (+@@) number of conversion in the regular channels group sequencer.
  570. -@@- (*) and (**) are performing the same configuration
  571. (#) Get the conversion data: This subsection provides an important function in
  572. the ADC peripheral since it returns the converted data of the current
  573. regular channel. When the Conversion value is read, the EOC Flag is
  574. automatically cleared.
  575. -@- For multi ADC mode, the last ADC1, ADC2 and ADC3 regular conversions
  576. results data (in the selected multi mode) can be returned in the same
  577. time using ADC_GetMultiModeConversionValue() function.
  578. @endverbatim
  579. * @{
  580. */
  581. /**
  582. * @brief Configures for the selected ADC regular channel its corresponding
  583. * rank in the sequencer and its sample time.
  584. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  585. * @param ADC_Channel: the ADC channel to configure.
  586. * This parameter can be one of the following values:
  587. * @arg ADC_Channel_0: ADC Channel0 selected
  588. * @arg ADC_Channel_1: ADC Channel1 selected
  589. * @arg ADC_Channel_2: ADC Channel2 selected
  590. * @arg ADC_Channel_3: ADC Channel3 selected
  591. * @arg ADC_Channel_4: ADC Channel4 selected
  592. * @arg ADC_Channel_5: ADC Channel5 selected
  593. * @arg ADC_Channel_6: ADC Channel6 selected
  594. * @arg ADC_Channel_7: ADC Channel7 selected
  595. * @arg ADC_Channel_8: ADC Channel8 selected
  596. * @arg ADC_Channel_9: ADC Channel9 selected
  597. * @arg ADC_Channel_10: ADC Channel10 selected
  598. * @arg ADC_Channel_11: ADC Channel11 selected
  599. * @arg ADC_Channel_12: ADC Channel12 selected
  600. * @arg ADC_Channel_13: ADC Channel13 selected
  601. * @arg ADC_Channel_14: ADC Channel14 selected
  602. * @arg ADC_Channel_15: ADC Channel15 selected
  603. * @arg ADC_Channel_16: ADC Channel16 selected
  604. * @arg ADC_Channel_17: ADC Channel17 selected
  605. * @arg ADC_Channel_18: ADC Channel18 selected
  606. * @param Rank: The rank in the regular group sequencer.
  607. * This parameter must be between 1 to 16.
  608. * @param ADC_SampleTime: The sample time value to be set for the selected channel.
  609. * This parameter can be one of the following values:
  610. * @arg ADC_SampleTime_3Cycles: Sample time equal to 3 cycles
  611. * @arg ADC_SampleTime_15Cycles: Sample time equal to 15 cycles
  612. * @arg ADC_SampleTime_28Cycles: Sample time equal to 28 cycles
  613. * @arg ADC_SampleTime_56Cycles: Sample time equal to 56 cycles
  614. * @arg ADC_SampleTime_84Cycles: Sample time equal to 84 cycles
  615. * @arg ADC_SampleTime_112Cycles: Sample time equal to 112 cycles
  616. * @arg ADC_SampleTime_144Cycles: Sample time equal to 144 cycles
  617. * @arg ADC_SampleTime_480Cycles: Sample time equal to 480 cycles
  618. * @retval None
  619. */
  620. void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
  621. {
  622. uint32_t tmpreg1 = 0, tmpreg2 = 0;
  623. /* Check the parameters */
  624. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  625. assert_param(IS_ADC_CHANNEL(ADC_Channel));
  626. assert_param(IS_ADC_REGULAR_RANK(Rank));
  627. assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
  628. /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
  629. if (ADC_Channel > ADC_Channel_9)
  630. {
  631. /* Get the old register value */
  632. tmpreg1 = ADCx->SMPR1;
  633. /* Calculate the mask to clear */
  634. tmpreg2 = SMPR1_SMP_SET << (3 * (ADC_Channel - 10));
  635. /* Clear the old sample time */
  636. tmpreg1 &= ~tmpreg2;
  637. /* Calculate the mask to set */
  638. tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
  639. /* Set the new sample time */
  640. tmpreg1 |= tmpreg2;
  641. /* Store the new register value */
  642. ADCx->SMPR1 = tmpreg1;
  643. }
  644. else /* ADC_Channel include in ADC_Channel_[0..9] */
  645. {
  646. /* Get the old register value */
  647. tmpreg1 = ADCx->SMPR2;
  648. /* Calculate the mask to clear */
  649. tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel);
  650. /* Clear the old sample time */
  651. tmpreg1 &= ~tmpreg2;
  652. /* Calculate the mask to set */
  653. tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
  654. /* Set the new sample time */
  655. tmpreg1 |= tmpreg2;
  656. /* Store the new register value */
  657. ADCx->SMPR2 = tmpreg1;
  658. }
  659. /* For Rank 1 to 6 */
  660. if (Rank < 7)
  661. {
  662. /* Get the old register value */
  663. tmpreg1 = ADCx->SQR3;
  664. /* Calculate the mask to clear */
  665. tmpreg2 = SQR3_SQ_SET << (5 * (Rank - 1));
  666. /* Clear the old SQx bits for the selected rank */
  667. tmpreg1 &= ~tmpreg2;
  668. /* Calculate the mask to set */
  669. tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1));
  670. /* Set the SQx bits for the selected rank */
  671. tmpreg1 |= tmpreg2;
  672. /* Store the new register value */
  673. ADCx->SQR3 = tmpreg1;
  674. }
  675. /* For Rank 7 to 12 */
  676. else if (Rank < 13)
  677. {
  678. /* Get the old register value */
  679. tmpreg1 = ADCx->SQR2;
  680. /* Calculate the mask to clear */
  681. tmpreg2 = SQR2_SQ_SET << (5 * (Rank - 7));
  682. /* Clear the old SQx bits for the selected rank */
  683. tmpreg1 &= ~tmpreg2;
  684. /* Calculate the mask to set */
  685. tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7));
  686. /* Set the SQx bits for the selected rank */
  687. tmpreg1 |= tmpreg2;
  688. /* Store the new register value */
  689. ADCx->SQR2 = tmpreg1;
  690. }
  691. /* For Rank 13 to 16 */
  692. else
  693. {
  694. /* Get the old register value */
  695. tmpreg1 = ADCx->SQR1;
  696. /* Calculate the mask to clear */
  697. tmpreg2 = SQR1_SQ_SET << (5 * (Rank - 13));
  698. /* Clear the old SQx bits for the selected rank */
  699. tmpreg1 &= ~tmpreg2;
  700. /* Calculate the mask to set */
  701. tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13));
  702. /* Set the SQx bits for the selected rank */
  703. tmpreg1 |= tmpreg2;
  704. /* Store the new register value */
  705. ADCx->SQR1 = tmpreg1;
  706. }
  707. }
  708. /**
  709. * @brief Enables the selected ADC software start conversion of the regular channels.
  710. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  711. * @retval None
  712. */
  713. void ADC_SoftwareStartConv(ADC_TypeDef* ADCx)
  714. {
  715. /* Check the parameters */
  716. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  717. /* Enable the selected ADC conversion for regular group */
  718. ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART;
  719. }
  720. /**
  721. * @brief Gets the selected ADC Software start regular conversion Status.
  722. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  723. * @retval The new state of ADC software start conversion (SET or RESET).
  724. */
  725. FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
  726. {
  727. FlagStatus bitstatus = RESET;
  728. /* Check the parameters */
  729. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  730. /* Check the status of SWSTART bit */
  731. if ((ADCx->CR2 & ADC_CR2_SWSTART) != (uint32_t)RESET)
  732. {
  733. /* SWSTART bit is set */
  734. bitstatus = SET;
  735. }
  736. else
  737. {
  738. /* SWSTART bit is reset */
  739. bitstatus = RESET;
  740. }
  741. /* Return the SWSTART bit status */
  742. return bitstatus;
  743. }
  744. /**
  745. * @brief Enables or disables the EOC on each regular channel conversion
  746. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  747. * @param NewState: new state of the selected ADC EOC flag rising
  748. * This parameter can be: ENABLE or DISABLE.
  749. * @retval None
  750. */
  751. void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  752. {
  753. /* Check the parameters */
  754. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  755. assert_param(IS_FUNCTIONAL_STATE(NewState));
  756. if (NewState != DISABLE)
  757. {
  758. /* Enable the selected ADC EOC rising on each regular channel conversion */
  759. ADCx->CR2 |= (uint32_t)ADC_CR2_EOCS;
  760. }
  761. else
  762. {
  763. /* Disable the selected ADC EOC rising on each regular channel conversion */
  764. ADCx->CR2 &= (uint32_t)(~ADC_CR2_EOCS);
  765. }
  766. }
  767. /**
  768. * @brief Enables or disables the ADC continuous conversion mode
  769. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  770. * @param NewState: new state of the selected ADC continuous conversion mode
  771. * This parameter can be: ENABLE or DISABLE.
  772. * @retval None
  773. */
  774. void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  775. {
  776. /* Check the parameters */
  777. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  778. assert_param(IS_FUNCTIONAL_STATE(NewState));
  779. if (NewState != DISABLE)
  780. {
  781. /* Enable the selected ADC continuous conversion mode */
  782. ADCx->CR2 |= (uint32_t)ADC_CR2_CONT;
  783. }
  784. else
  785. {
  786. /* Disable the selected ADC continuous conversion mode */
  787. ADCx->CR2 &= (uint32_t)(~ADC_CR2_CONT);
  788. }
  789. }
  790. /**
  791. * @brief Configures the discontinuous mode for the selected ADC regular group
  792. * channel.
  793. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  794. * @param Number: specifies the discontinuous mode regular channel count value.
  795. * This number must be between 1 and 8.
  796. * @retval None
  797. */
  798. void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
  799. {
  800. uint32_t tmpreg1 = 0;
  801. uint32_t tmpreg2 = 0;
  802. /* Check the parameters */
  803. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  804. assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
  805. /* Get the old register value */
  806. tmpreg1 = ADCx->CR1;
  807. /* Clear the old discontinuous mode channel count */
  808. tmpreg1 &= CR1_DISCNUM_RESET;
  809. /* Set the discontinuous mode channel count */
  810. tmpreg2 = Number - 1;
  811. tmpreg1 |= tmpreg2 << 13;
  812. /* Store the new register value */
  813. ADCx->CR1 = tmpreg1;
  814. }
  815. /**
  816. * @brief Enables or disables the discontinuous mode on regular group channel
  817. * for the specified ADC
  818. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  819. * @param NewState: new state of the selected ADC discontinuous mode on
  820. * regular group channel.
  821. * This parameter can be: ENABLE or DISABLE.
  822. * @retval None
  823. */
  824. void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  825. {
  826. /* Check the parameters */
  827. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  828. assert_param(IS_FUNCTIONAL_STATE(NewState));
  829. if (NewState != DISABLE)
  830. {
  831. /* Enable the selected ADC regular discontinuous mode */
  832. ADCx->CR1 |= (uint32_t)ADC_CR1_DISCEN;
  833. }
  834. else
  835. {
  836. /* Disable the selected ADC regular discontinuous mode */
  837. ADCx->CR1 &= (uint32_t)(~ADC_CR1_DISCEN);
  838. }
  839. }
  840. /**
  841. * @brief Returns the last ADCx conversion result data for regular channel.
  842. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  843. * @retval The Data conversion value.
  844. */
  845. uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
  846. {
  847. /* Check the parameters */
  848. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  849. /* Return the selected ADC conversion value */
  850. return (uint16_t) ADCx->DR;
  851. }
  852. /**
  853. * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
  854. * data in the selected multi mode.
  855. * @param None
  856. * @retval The Data conversion value.
  857. * @note In dual mode, the value returned by this function is as following
  858. * Data[15:0] : these bits contain the regular data of ADC1.
  859. * Data[31:16]: these bits contain the regular data of ADC2.
  860. * @note In triple mode, the value returned by this function is as following
  861. * Data[15:0] : these bits contain alternatively the regular data of ADC1, ADC3 and ADC2.
  862. * Data[31:16]: these bits contain alternatively the regular data of ADC2, ADC1 and ADC3.
  863. */
  864. uint32_t ADC_GetMultiModeConversionValue(void)
  865. {
  866. /* Return the multi mode conversion value */
  867. return (*(__IO uint32_t *) CDR_ADDRESS);
  868. }
  869. /**
  870. * @}
  871. */
  872. /** @defgroup ADC_Group5 Regular Channels DMA Configuration functions
  873. * @brief Regular Channels DMA Configuration functions
  874. *
  875. @verbatim
  876. ===============================================================================
  877. ##### Regular Channels DMA Configuration functions #####
  878. ===============================================================================
  879. [..] This section provides functions allowing to configure the DMA for ADC
  880. regular channels.
  881. Since converted regular channel values are stored into a unique data
  882. register, it is useful to use DMA for conversion of more than one regular
  883. channel. This avoids the loss of the data already stored in the ADC
  884. Data register.
  885. When the DMA mode is enabled (using the ADC_DMACmd() function), after each
  886. conversion of a regular channel, a DMA request is generated.
  887. [..] Depending on the "DMA disable selection for Independent ADC mode"
  888. configuration (using the ADC_DMARequestAfterLastTransferCmd() function),
  889. at the end of the last DMA transfer, two possibilities are allowed:
  890. (+) No new DMA request is issued to the DMA controller (feature DISABLED)
  891. (+) Requests can continue to be generated (feature ENABLED).
  892. [..] Depending on the "DMA disable selection for multi ADC mode" configuration
  893. (using the void ADC_MultiModeDMARequestAfterLastTransferCmd() function),
  894. at the end of the last DMA transfer, two possibilities are allowed:
  895. (+) No new DMA request is issued to the DMA controller (feature DISABLED)
  896. (+) Requests can continue to be generated (feature ENABLED).
  897. @endverbatim
  898. * @{
  899. */
  900. /**
  901. * @brief Enables or disables the specified ADC DMA request.
  902. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  903. * @param NewState: new state of the selected ADC DMA transfer.
  904. * This parameter can be: ENABLE or DISABLE.
  905. * @retval None
  906. */
  907. void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  908. {
  909. /* Check the parameters */
  910. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  911. assert_param(IS_FUNCTIONAL_STATE(NewState));
  912. if (NewState != DISABLE)
  913. {
  914. /* Enable the selected ADC DMA request */
  915. ADCx->CR2 |= (uint32_t)ADC_CR2_DMA;
  916. }
  917. else
  918. {
  919. /* Disable the selected ADC DMA request */
  920. ADCx->CR2 &= (uint32_t)(~ADC_CR2_DMA);
  921. }
  922. }
  923. /**
  924. * @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode)
  925. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  926. * @param NewState: new state of the selected ADC DMA request after last transfer.
  927. * This parameter can be: ENABLE or DISABLE.
  928. * @retval None
  929. */
  930. void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  931. {
  932. /* Check the parameters */
  933. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  934. assert_param(IS_FUNCTIONAL_STATE(NewState));
  935. if (NewState != DISABLE)
  936. {
  937. /* Enable the selected ADC DMA request after last transfer */
  938. ADCx->CR2 |= (uint32_t)ADC_CR2_DDS;
  939. }
  940. else
  941. {
  942. /* Disable the selected ADC DMA request after last transfer */
  943. ADCx->CR2 &= (uint32_t)(~ADC_CR2_DDS);
  944. }
  945. }
  946. /**
  947. * @brief Enables or disables the ADC DMA request after last transfer in multi ADC mode
  948. * @param NewState: new state of the selected ADC DMA request after last transfer.
  949. * This parameter can be: ENABLE or DISABLE.
  950. * @note if Enabled, DMA requests are issued as long as data are converted and
  951. * DMA mode for multi ADC mode (selected using ADC_CommonInit() function
  952. * by ADC_CommonInitStruct.ADC_DMAAccessMode structure member) is
  953. * ADC_DMAAccessMode_1, ADC_DMAAccessMode_2 or ADC_DMAAccessMode_3.
  954. * @retval None
  955. */
  956. void ADC_MultiModeDMARequestAfterLastTransferCmd(FunctionalState NewState)
  957. {
  958. /* Check the parameters */
  959. assert_param(IS_FUNCTIONAL_STATE(NewState));
  960. if (NewState != DISABLE)
  961. {
  962. /* Enable the selected ADC DMA request after last transfer */
  963. ADC->CCR |= (uint32_t)ADC_CCR_DDS;
  964. }
  965. else
  966. {
  967. /* Disable the selected ADC DMA request after last transfer */
  968. ADC->CCR &= (uint32_t)(~ADC_CCR_DDS);
  969. }
  970. }
  971. /**
  972. * @}
  973. */
  974. /** @defgroup ADC_Group6 Injected channels Configuration functions
  975. * @brief Injected channels Configuration functions
  976. *
  977. @verbatim
  978. ===============================================================================
  979. ##### Injected channels Configuration functions #####
  980. ===============================================================================
  981. [..] This section provide functions allowing to configure the ADC Injected channels,
  982. it is composed of 2 sub sections :
  983. (#) Configuration functions for Injected channels: This subsection provides
  984. functions allowing to configure the ADC injected channels :
  985. (++) Configure the rank in the injected group sequencer for each channel
  986. (++) Configure the sampling time for each channel
  987. (++) Activate the Auto injected Mode
  988. (++) Activate the Discontinuous Mode
  989. (++) scan mode activation
  990. (++) External/software trigger source
  991. (++) External trigger edge
  992. (++) injected channels sequencer.
  993. (#) Get the Specified Injected channel conversion data: This subsection
  994. provides an important function in the ADC peripheral since it returns the
  995. converted data of the specific injected channel.
  996. @endverbatim
  997. * @{
  998. */
  999. /**
  1000. * @brief Configures for the selected ADC injected channel its corresponding
  1001. * rank in the sequencer and its sample time.
  1002. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1003. * @param ADC_Channel: the ADC channel to configure.
  1004. * This parameter can be one of the following values:
  1005. * @arg ADC_Channel_0: ADC Channel0 selected
  1006. * @arg ADC_Channel_1: ADC Channel1 selected
  1007. * @arg ADC_Channel_2: ADC Channel2 selected
  1008. * @arg ADC_Channel_3: ADC Channel3 selected
  1009. * @arg ADC_Channel_4: ADC Channel4 selected
  1010. * @arg ADC_Channel_5: ADC Channel5 selected
  1011. * @arg ADC_Channel_6: ADC Channel6 selected
  1012. * @arg ADC_Channel_7: ADC Channel7 selected
  1013. * @arg ADC_Channel_8: ADC Channel8 selected
  1014. * @arg ADC_Channel_9: ADC Channel9 selected
  1015. * @arg ADC_Channel_10: ADC Channel10 selected
  1016. * @arg ADC_Channel_11: ADC Channel11 selected
  1017. * @arg ADC_Channel_12: ADC Channel12 selected
  1018. * @arg ADC_Channel_13: ADC Channel13 selected
  1019. * @arg ADC_Channel_14: ADC Channel14 selected
  1020. * @arg ADC_Channel_15: ADC Channel15 selected
  1021. * @arg ADC_Channel_16: ADC Channel16 selected
  1022. * @arg ADC_Channel_17: ADC Channel17 selected
  1023. * @arg ADC_Channel_18: ADC Channel18 selected
  1024. * @param Rank: The rank in the injected group sequencer.
  1025. * This parameter must be between 1 to 4.
  1026. * @param ADC_SampleTime: The sample time value to be set for the selected channel.
  1027. * This parameter can be one of the following values:
  1028. * @arg ADC_SampleTime_3Cycles: Sample time equal to 3 cycles
  1029. * @arg ADC_SampleTime_15Cycles: Sample time equal to 15 cycles
  1030. * @arg ADC_SampleTime_28Cycles: Sample time equal to 28 cycles
  1031. * @arg ADC_SampleTime_56Cycles: Sample time equal to 56 cycles
  1032. * @arg ADC_SampleTime_84Cycles: Sample time equal to 84 cycles
  1033. * @arg ADC_SampleTime_112Cycles: Sample time equal to 112 cycles
  1034. * @arg ADC_SampleTime_144Cycles: Sample time equal to 144 cycles
  1035. * @arg ADC_SampleTime_480Cycles: Sample time equal to 480 cycles
  1036. * @retval None
  1037. */
  1038. void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
  1039. {
  1040. uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
  1041. /* Check the parameters */
  1042. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1043. assert_param(IS_ADC_CHANNEL(ADC_Channel));
  1044. assert_param(IS_ADC_INJECTED_RANK(Rank));
  1045. assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
  1046. /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
  1047. if (ADC_Channel > ADC_Channel_9)
  1048. {
  1049. /* Get the old register value */
  1050. tmpreg1 = ADCx->SMPR1;
  1051. /* Calculate the mask to clear */
  1052. tmpreg2 = SMPR1_SMP_SET << (3*(ADC_Channel - 10));
  1053. /* Clear the old sample time */
  1054. tmpreg1 &= ~tmpreg2;
  1055. /* Calculate the mask to set */
  1056. tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10));
  1057. /* Set the new sample time */
  1058. tmpreg1 |= tmpreg2;
  1059. /* Store the new register value */
  1060. ADCx->SMPR1 = tmpreg1;
  1061. }
  1062. else /* ADC_Channel include in ADC_Channel_[0..9] */
  1063. {
  1064. /* Get the old register value */
  1065. tmpreg1 = ADCx->SMPR2;
  1066. /* Calculate the mask to clear */
  1067. tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel);
  1068. /* Clear the old sample time */
  1069. tmpreg1 &= ~tmpreg2;
  1070. /* Calculate the mask to set */
  1071. tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
  1072. /* Set the new sample time */
  1073. tmpreg1 |= tmpreg2;
  1074. /* Store the new register value */
  1075. ADCx->SMPR2 = tmpreg1;
  1076. }
  1077. /* Rank configuration */
  1078. /* Get the old register value */
  1079. tmpreg1 = ADCx->JSQR;
  1080. /* Get JL value: Number = JL+1 */
  1081. tmpreg3 = (tmpreg1 & JSQR_JL_SET)>> 20;
  1082. /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
  1083. tmpreg2 = JSQR_JSQ_SET << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
  1084. /* Clear the old JSQx bits for the selected rank */
  1085. tmpreg1 &= ~tmpreg2;
  1086. /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
  1087. tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
  1088. /* Set the JSQx bits for the selected rank */
  1089. tmpreg1 |= tmpreg2;
  1090. /* Store the new register value */
  1091. ADCx->JSQR = tmpreg1;
  1092. }
  1093. /**
  1094. * @brief Configures the sequencer length for injected channels
  1095. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1096. * @param Length: The sequencer length.
  1097. * This parameter must be a number between 1 to 4.
  1098. * @retval None
  1099. */
  1100. void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length)
  1101. {
  1102. uint32_t tmpreg1 = 0;
  1103. uint32_t tmpreg2 = 0;
  1104. /* Check the parameters */
  1105. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1106. assert_param(IS_ADC_INJECTED_LENGTH(Length));
  1107. /* Get the old register value */
  1108. tmpreg1 = ADCx->JSQR;
  1109. /* Clear the old injected sequence length JL bits */
  1110. tmpreg1 &= JSQR_JL_RESET;
  1111. /* Set the injected sequence length JL bits */
  1112. tmpreg2 = Length - 1;
  1113. tmpreg1 |= tmpreg2 << 20;
  1114. /* Store the new register value */
  1115. ADCx->JSQR = tmpreg1;
  1116. }
  1117. /**
  1118. * @brief Set the injected channels conversion value offset
  1119. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1120. * @param ADC_InjectedChannel: the ADC injected channel to set its offset.
  1121. * This parameter can be one of the following values:
  1122. * @arg ADC_InjectedChannel_1: Injected Channel1 selected
  1123. * @arg ADC_InjectedChannel_2: Injected Channel2 selected
  1124. * @arg ADC_InjectedChannel_3: Injected Channel3 selected
  1125. * @arg ADC_InjectedChannel_4: Injected Channel4 selected
  1126. * @param Offset: the offset value for the selected ADC injected channel
  1127. * This parameter must be a 12bit value.
  1128. * @retval None
  1129. */
  1130. void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
  1131. {
  1132. __IO uint32_t tmp = 0;
  1133. /* Check the parameters */
  1134. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1135. assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
  1136. assert_param(IS_ADC_OFFSET(Offset));
  1137. tmp = (uint32_t)ADCx;
  1138. tmp += ADC_InjectedChannel;
  1139. /* Set the selected injected channel data offset */
  1140. *(__IO uint32_t *) tmp = (uint32_t)Offset;
  1141. }
  1142. /**
  1143. * @brief Configures the ADCx external trigger for injected channels conversion.
  1144. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1145. * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion.
  1146. * This parameter can be one of the following values:
  1147. * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected
  1148. * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected
  1149. * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected
  1150. * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected
  1151. * @arg ADC_ExternalTrigInjecConv_T3_CC2: Timer3 capture compare2 selected
  1152. * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected
  1153. * @arg ADC_ExternalTrigInjecConv_T4_CC1: Timer4 capture compare1 selected
  1154. * @arg ADC_ExternalTrigInjecConv_T4_CC2: Timer4 capture compare2 selected
  1155. * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected
  1156. * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected
  1157. * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected
  1158. * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected
  1159. * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected
  1160. * @arg ADC_ExternalTrigInjecConv_T8_CC3: Timer8 capture compare3 selected
  1161. * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected
  1162. * @arg ADC_ExternalTrigInjecConv_Ext_IT15: External interrupt line 15 event selected
  1163. * @retval None
  1164. */
  1165. void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv)
  1166. {
  1167. uint32_t tmpreg = 0;
  1168. /* Check the parameters */
  1169. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1170. assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
  1171. /* Get the old register value */
  1172. tmpreg = ADCx->CR2;
  1173. /* Clear the old external event selection for injected group */
  1174. tmpreg &= CR2_JEXTSEL_RESET;
  1175. /* Set the external event selection for injected group */
  1176. tmpreg |= ADC_ExternalTrigInjecConv;
  1177. /* Store the new register value */
  1178. ADCx->CR2 = tmpreg;
  1179. }
  1180. /**
  1181. * @brief Configures the ADCx external trigger edge for injected channels conversion.
  1182. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1183. * @param ADC_ExternalTrigInjecConvEdge: specifies the ADC external trigger edge
  1184. * to start injected conversion.
  1185. * This parameter can be one of the following values:
  1186. * @arg ADC_ExternalTrigInjecConvEdge_None: external trigger disabled for
  1187. * injected conversion
  1188. * @arg ADC_ExternalTrigInjecConvEdge_Rising: detection on rising edge
  1189. * @arg ADC_ExternalTrigInjecConvEdge_Falling: detection on falling edge
  1190. * @arg ADC_ExternalTrigInjecConvEdge_RisingFalling: detection on both rising
  1191. * and falling edge
  1192. * @retval None
  1193. */
  1194. void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge)
  1195. {
  1196. uint32_t tmpreg = 0;
  1197. /* Check the parameters */
  1198. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1199. assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(ADC_ExternalTrigInjecConvEdge));
  1200. /* Get the old register value */
  1201. tmpreg = ADCx->CR2;
  1202. /* Clear the old external trigger edge for injected group */
  1203. tmpreg &= CR2_JEXTEN_RESET;
  1204. /* Set the new external trigger edge for injected group */
  1205. tmpreg |= ADC_ExternalTrigInjecConvEdge;
  1206. /* Store the new register value */
  1207. ADCx->CR2 = tmpreg;
  1208. }
  1209. /**
  1210. * @brief Enables the selected ADC software start conversion of the injected channels.
  1211. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1212. * @retval None
  1213. */
  1214. void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx)
  1215. {
  1216. /* Check the parameters */
  1217. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1218. /* Enable the selected ADC conversion for injected group */
  1219. ADCx->CR2 |= (uint32_t)ADC_CR2_JSWSTART;
  1220. }
  1221. /**
  1222. * @brief Gets the selected ADC Software start injected conversion Status.
  1223. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1224. * @retval The new state of ADC software start injected conversion (SET or RESET).
  1225. */
  1226. FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
  1227. {
  1228. FlagStatus bitstatus = RESET;
  1229. /* Check the parameters */
  1230. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1231. /* Check the status of JSWSTART bit */
  1232. if ((ADCx->CR2 & ADC_CR2_JSWSTART) != (uint32_t)RESET)
  1233. {
  1234. /* JSWSTART bit is set */
  1235. bitstatus = SET;
  1236. }
  1237. else
  1238. {
  1239. /* JSWSTART bit is reset */
  1240. bitstatus = RESET;
  1241. }
  1242. /* Return the JSWSTART bit status */
  1243. return bitstatus;
  1244. }
  1245. /**
  1246. * @brief Enables or disables the selected ADC automatic injected group
  1247. * conversion after regular one.
  1248. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1249. * @param NewState: new state of the selected ADC auto injected conversion
  1250. * This parameter can be: ENABLE or DISABLE.
  1251. * @retval None
  1252. */
  1253. void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  1254. {
  1255. /* Check the parameters */
  1256. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1257. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1258. if (NewState != DISABLE)
  1259. {
  1260. /* Enable the selected ADC automatic injected group conversion */
  1261. ADCx->CR1 |= (uint32_t)ADC_CR1_JAUTO;
  1262. }
  1263. else
  1264. {
  1265. /* Disable the selected ADC automatic injected group conversion */
  1266. ADCx->CR1 &= (uint32_t)(~ADC_CR1_JAUTO);
  1267. }
  1268. }
  1269. /**
  1270. * @brief Enables or disables the discontinuous mode for injected group
  1271. * channel for the specified ADC
  1272. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1273. * @param NewState: new state of the selected ADC discontinuous mode on injected
  1274. * group channel.
  1275. * This parameter can be: ENABLE or DISABLE.
  1276. * @retval None
  1277. */
  1278. void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  1279. {
  1280. /* Check the parameters */
  1281. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1282. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1283. if (NewState != DISABLE)
  1284. {
  1285. /* Enable the selected ADC injected discontinuous mode */
  1286. ADCx->CR1 |= (uint32_t)ADC_CR1_JDISCEN;
  1287. }
  1288. else
  1289. {
  1290. /* Disable the selected ADC injected discontinuous mode */
  1291. ADCx->CR1 &= (uint32_t)(~ADC_CR1_JDISCEN);
  1292. }
  1293. }
  1294. /**
  1295. * @brief Returns the ADC injected channel conversion result
  1296. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1297. * @param ADC_InjectedChannel: the converted ADC injected channel.
  1298. * This parameter can be one of the following values:
  1299. * @arg ADC_InjectedChannel_1: Injected Channel1 selected
  1300. * @arg ADC_InjectedChannel_2: Injected Channel2 selected
  1301. * @arg ADC_InjectedChannel_3: Injected Channel3 selected
  1302. * @arg ADC_InjectedChannel_4: Injected Channel4 selected
  1303. * @retval The Data conversion value.
  1304. */
  1305. uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel)
  1306. {
  1307. __IO uint32_t tmp = 0;
  1308. /* Check the parameters */
  1309. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1310. assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
  1311. tmp = (uint32_t)ADCx;
  1312. tmp += ADC_InjectedChannel + JDR_OFFSET;
  1313. /* Returns the selected injected channel conversion data value */
  1314. return (uint16_t) (*(__IO uint32_t*) tmp);
  1315. }
  1316. /**
  1317. * @}
  1318. */
  1319. /** @defgroup ADC_Group7 Interrupts and flags management functions
  1320. * @brief Interrupts and flags management functions
  1321. *
  1322. @verbatim
  1323. ===============================================================================
  1324. ##### Interrupts and flags management functions #####
  1325. ===============================================================================
  1326. [..] This section provides functions allowing to configure the ADC Interrupts
  1327. and to get the status and clear flags and Interrupts pending bits.
  1328. [..] Each ADC provides 4 Interrupts sources and 6 Flags which can be divided
  1329. into 3 groups:
  1330. *** Flags and Interrupts for ADC regular channels ***
  1331. =====================================================
  1332. [..]
  1333. (+) Flags :
  1334. (##) ADC_FLAG_OVR : Overrun detection when regular converted data are lost
  1335. (##) ADC_FLAG_EOC : Regular channel end of conversion ==> to indicate
  1336. (depending on EOCS bit, managed by ADC_EOCOnEachRegularChannelCmd() )
  1337. the end of:
  1338. (+++) a regular CHANNEL conversion
  1339. (+++) sequence of regular GROUP conversions .
  1340. (##) ADC_FLAG_STRT: Regular channel start ==> to indicate when regular
  1341. CHANNEL conversion starts.
  1342. [..]
  1343. (+) Interrupts :
  1344. (##) ADC_IT_OVR : specifies the interrupt source for Overrun detection
  1345. event.
  1346. (##) ADC_IT_EOC : specifies the interrupt source for Regular channel end
  1347. of conversion event.
  1348. *** Flags and Interrupts for ADC Injected channels ***
  1349. ======================================================
  1350. [..]
  1351. (+) Flags :
  1352. (##) ADC_FLAG_JEOC : Injected channel end of conversion ==> to indicate
  1353. at the end of injected GROUP conversion
  1354. (##) ADC_FLAG_JSTRT: Injected channel start ==> to indicate hardware when
  1355. injected GROUP conversion starts.
  1356. [..]
  1357. (+) Interrupts :
  1358. (##) ADC_IT_JEOC : specifies the interrupt source for Injected channel
  1359. end of conversion event.
  1360. *** General Flags and Interrupts for the ADC ***
  1361. ================================================
  1362. [..]
  1363. (+)Flags :
  1364. (##) ADC_FLAG_AWD: Analog watchdog ==> to indicate if the converted voltage
  1365. crosses the programmed thresholds values.
  1366. [..]
  1367. (+) Interrupts :
  1368. (##) ADC_IT_AWD : specifies the interrupt source for Analog watchdog event.
  1369. [..] The user should identify which mode will be used in his application to
  1370. manage the ADC controller events: Polling mode or Interrupt mode.
  1371. [..] In the Polling Mode it is advised to use the following functions:
  1372. (+) ADC_GetFlagStatus() : to check if flags events occur.
  1373. (+) ADC_ClearFlag() : to clear the flags events.
  1374. [..] In the Interrupt Mode it is advised to use the following functions:
  1375. (+) ADC_ITConfig() : to enable or disable the interrupt source.
  1376. (+) ADC_GetITStatus() : to check if Interrupt occurs.
  1377. (+) ADC_ClearITPendingBit() : to clear the Interrupt pending Bit
  1378. (corresponding Flag).
  1379. @endverbatim
  1380. * @{
  1381. */
  1382. /**
  1383. * @brief Enables or disables the specified ADC interrupts.
  1384. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1385. * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
  1386. * This parameter can be one of the following values:
  1387. * @arg ADC_IT_EOC: End of conversion interrupt mask
  1388. * @arg ADC_IT_AWD: Analog watchdog interrupt mask
  1389. * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
  1390. * @arg ADC_IT_OVR: Overrun interrupt enable
  1391. * @param NewState: new state of the specified ADC interrupts.
  1392. * This parameter can be: ENABLE or DISABLE.
  1393. * @retval None
  1394. */
  1395. void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)
  1396. {
  1397. uint32_t itmask = 0;
  1398. /* Check the parameters */
  1399. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1400. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1401. assert_param(IS_ADC_IT(ADC_IT));
  1402. /* Get the ADC IT index */
  1403. itmask = (uint8_t)ADC_IT;
  1404. itmask = (uint32_t)0x01 << itmask;
  1405. if (NewState != DISABLE)
  1406. {
  1407. /* Enable the selected ADC interrupts */
  1408. ADCx->CR1 |= itmask;
  1409. }
  1410. else
  1411. {
  1412. /* Disable the selected ADC interrupts */
  1413. ADCx->CR1 &= (~(uint32_t)itmask);
  1414. }
  1415. }
  1416. /**
  1417. * @brief Checks whether the specified ADC flag is set or not.
  1418. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1419. * @param ADC_FLAG: specifies the flag to check.
  1420. * This parameter can be one of the following values:
  1421. * @arg ADC_FLAG_AWD: Analog watchdog flag
  1422. * @arg ADC_FLAG_EOC: End of conversion flag
  1423. * @arg ADC_FLAG_JEOC: End of injected group conversion flag
  1424. * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
  1425. * @arg ADC_FLAG_STRT: Start of regular group conversion flag
  1426. * @arg ADC_FLAG_OVR: Overrun flag
  1427. * @retval The new state of ADC_FLAG (SET or RESET).
  1428. */
  1429. FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
  1430. {
  1431. FlagStatus bitstatus = RESET;
  1432. /* Check the parameters */
  1433. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1434. assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
  1435. /* Check the status of the specified ADC flag */
  1436. if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET)
  1437. {
  1438. /* ADC_FLAG is set */
  1439. bitstatus = SET;
  1440. }
  1441. else
  1442. {
  1443. /* ADC_FLAG is reset */
  1444. bitstatus = RESET;
  1445. }
  1446. /* Return the ADC_FLAG status */
  1447. return bitstatus;
  1448. }
  1449. /**
  1450. * @brief Clears the ADCx's pending flags.
  1451. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1452. * @param ADC_FLAG: specifies the flag to clear.
  1453. * This parameter can be any combination of the following values:
  1454. * @arg ADC_FLAG_AWD: Analog watchdog flag
  1455. * @arg ADC_FLAG_EOC: End of conversion flag
  1456. * @arg ADC_FLAG_JEOC: End of injected group conversion flag
  1457. * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
  1458. * @arg ADC_FLAG_STRT: Start of regular group conversion flag
  1459. * @arg ADC_FLAG_OVR: Overrun flag
  1460. * @retval None
  1461. */
  1462. void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
  1463. {
  1464. /* Check the parameters */
  1465. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1466. assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
  1467. /* Clear the selected ADC flags */
  1468. ADCx->SR = ~(uint32_t)ADC_FLAG;
  1469. }
  1470. /**
  1471. * @brief Checks whether the specified ADC interrupt has occurred or not.
  1472. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1473. * @param ADC_IT: specifies the ADC interrupt source to check.
  1474. * This parameter can be one of the following values:
  1475. * @arg ADC_IT_EOC: End of conversion interrupt mask
  1476. * @arg ADC_IT_AWD: Analog watchdog interrupt mask
  1477. * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
  1478. * @arg ADC_IT_OVR: Overrun interrupt mask
  1479. * @retval The new state of ADC_IT (SET or RESET).
  1480. */
  1481. ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT)
  1482. {
  1483. ITStatus bitstatus = RESET;
  1484. uint32_t itmask = 0, enablestatus = 0;
  1485. /* Check the parameters */
  1486. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1487. assert_param(IS_ADC_IT(ADC_IT));
  1488. /* Get the ADC IT index */
  1489. itmask = ADC_IT >> 8;
  1490. /* Get the ADC_IT enable bit status */
  1491. enablestatus = (ADCx->CR1 & ((uint32_t)0x01 << (uint8_t)ADC_IT)) ;
  1492. /* Check the status of the specified ADC interrupt */
  1493. if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus)
  1494. {
  1495. /* ADC_IT is set */
  1496. bitstatus = SET;
  1497. }
  1498. else
  1499. {
  1500. /* ADC_IT is reset */
  1501. bitstatus = RESET;
  1502. }
  1503. /* Return the ADC_IT status */
  1504. return bitstatus;
  1505. }
  1506. /**
  1507. * @brief Clears the ADCx's interrupt pending bits.
  1508. * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
  1509. * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
  1510. * This parameter can be one of the following values:
  1511. * @arg ADC_IT_EOC: End of conversion interrupt mask
  1512. * @arg ADC_IT_AWD: Analog watchdog interrupt mask
  1513. * @arg ADC_IT_JEOC: End of injected conversion interrupt mask
  1514. * @arg ADC_IT_OVR: Overrun interrupt mask
  1515. * @retval None
  1516. */
  1517. void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT)
  1518. {
  1519. uint8_t itmask = 0;
  1520. /* Check the parameters */
  1521. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  1522. assert_param(IS_ADC_IT(ADC_IT));
  1523. /* Get the ADC IT index */
  1524. itmask = (uint8_t)(ADC_IT >> 8);
  1525. /* Clear the selected ADC interrupt pending bits */
  1526. ADCx->SR = ~(uint32_t)itmask;
  1527. }
  1528. /**
  1529. * @}
  1530. */
  1531. /**
  1532. * @}
  1533. */
  1534. /**
  1535. * @}
  1536. */
  1537. /**
  1538. * @}
  1539. */