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{"sheet":"CPU管脚定义表","index":0,"n_rows":40,"n_cols":6,"rows_kept":40,"cut":false,"hidden":false,"merged":[[1,0,2,0],[3,0,5,0],[7,0,10,0],[11,0,14,0],[15,0,19,0],[26,0,32,0],[33,0,39,0],[1,1,2,1],[3,1,5,1],[7,1,10,1],[11,1,14,1],[15,1,19,1],[26,1,32,1],[33,1,39,1],[1,2,2,2],[3,2,5,2],[3,4,5,4],[11,4,12,4],[16,4,19,4],[29,4,32,4],[36,4,39,4],[3,5,4,5],[11,5,12,5]]}
["序号","功能名称","芯片管脚","对应CPU管脚--原理图NET名","对应CPU功能模块","说明"]
[1,"串口1——DEBUG调试用",null,"68脚 PA9 <-----> MCU_U1_TX","USART1"]
[null,null,null,"69脚 PA10 <-----> MCU_U1_RX"]
[2,"串口2—连接WIFI模块",null,"86脚 PD5 <-----> MCU_U2_TX","USART2","与电源模块的WIFI通信"]
[null,null,null,"87脚 PD6 <-----> MCU_U2_RX"]
[null,null,null,"83脚 PD2<-----> MCU_WIFI_REST",null,"设置成推挽输出：MCU_WIFI_REST 低电平有效"]
[3,"LED指示灯",null,"57脚 PD10 <-----> LED_YELLOW",null,"设置成推挽输出  高电平点亮  指示灯"]
[4,"控制功放芯片TPA3111D1PWP","TPA3111D1的2脚","29脚  PA4 <-----> MCU_TPA_FAULT",null,"IO设置成输入中断:用于显示短路或直流检测故障状态 "]
[null,null,"TPA3111D1的1脚","41脚 PE10<-----> MCU_TPA_SD",null,"IO设置成输出：音频放大器的关闭逻辑输入（LOW=输出Hi-Z，HIGH=输出启用）。TTL逻辑电平"]
[null,null,"TPA3111D1的5脚","31脚 PA6 <----->MCU_TPA_G0","GAIN0","IO设置成输出 看右图表"]
[null,null,"TPA3111D1的6脚","33脚 PC4 <----->MCU_TPA_G1","GAIN1","IO设置成输出 看右图表"]
[5,"控制DA芯片PCM1789PWR","PCM1789PWR的22脚","45脚 PE14<----->MCU_PCM_SCL","软件模拟","DA芯片  I2C地址：0x00"]
[null,null,"PCM1789PWR的21脚","44脚 PE13<----->MCU_PCM_SDA"]
[null,null,"PCM1789PWR的17脚","42脚 PE11<----->MCU_PCM_MUTE",null,"IO设置成输出  =0 模拟静音控制输入，低电平激活"]
[null,null,"PCM1789PWR的4脚","52脚 PB13<----->MCU_PCM_RST",null,"IO设置成输出  =0  状态下的复位和断电控制输入"]
[6,"控制CPLD芯片EPM570T100I5N","CPLD的73脚","55脚 PD8<----->MCU_CPLD_CE",null,"备用IO 可以作为片选信号"]
[null,null,"CPLD的76脚","84脚 PD3<----->MCU_I2S2_CK  BCK","I2S2硬件接口"," BCK  3M多 "]
[null,null,"CPLD的67脚","51脚 PB12<----->MCU_I2S2_WS LRCK",null,"LRCK 48K"]
[null,null,"CPLD的71脚","54脚 PB15<----->MCU_I2S2_SD DATA",null,"DATA"]
[null,null,"CPLD的69脚","53脚 PB14<----->MCU_I2S2_extSD",null,"备用  用不到"]
[null,null,"CPLD的68脚","59脚 PD12<----->MCU_CPLD_IO1",null,"备用  "]
[null,null,"CPLD的70脚","60脚 PD13<----->MCU_CPLD_IO2",null,"备用  "]
[null,null,"CPLD的72脚","61脚 PD14<----->MCU_CPLD_IO3",null,"备用  "]
[null,null,"CPLD的74脚","62脚 PD15<----->MCU_CPLD_IO4",null,"备用  "]
[null,null,"CPLD的75脚","63脚 PC6<----->MCU_CPLD_IO5",null,"备用  "]
[7,"12.288M输出","CPLD的GCLK0-12脚","66脚 PC9 <-----> MCO2","时钟","用于给cpld提供时钟"]
[8,"控制CMT2310A芯片  接收模块U10","GPIO0-23脚","35脚 PB0<----->MCU_RF1_GP0"]
[null,null,"GPIO1-22脚","36脚 PB1<----->MCU_RF1_GP1"]
[null,null,"RST-8脚","1脚 PE2<----->MCU_RF1_RST",null,"硬复位"]
[null,null,"NSEL-18脚","95脚 PB8<----->MCU_RF1_NSS","软件模拟"]
[null,null,"SDI-17脚","96脚 PB9<----->MCU_RF1_MOSI"]
[null,null,"SDIO-16脚","97脚 PE0<----->MCU_RF1_MISO"]
[null,null,"SCLK-15脚","98脚 PE1<----->MCU_RF1_CLK"]
[9,"控制CMT2310A芯片  发射模块U11","GPIO0-23脚","3脚 PE4 <----->MCU_RF2_GP0"]
[null,null,"GPIO1-22脚","2脚 PE3 <----->MCU_RF2_GP1"]
[null,null,"RST-8脚","26脚 PA3<----->MCU_RF2_RST",null,"硬复位"]
[null,null,"NSEL-18脚","4脚 PE5 <----->MCU_RF2_NSS","软件模拟"]
[null,null,"SDI-17脚","5脚 PE6 <----->MCU_RF2_MOSI"]
[null,null,"SDIO-16脚","16脚 PC1<----->MCU_RF2_MISO"]
[null,null,"SCLK-15脚","15脚 PC0<----->MCU_RF2_CLK"]

{"sheet":"CPLD管脚定义表","index":1,"n_rows":29,"n_cols":5,"rows_kept":29,"cut":false,"hidden":false,"merged":[[0,0,0,3]]}
["CPLD",null,null,null,"MCU"]
["序号","对应BANK","对应管脚","名称","对应STM32F429：MCU_I2S2"]
[{"$nulls":4},"与STM32F429"]
[1,"BANK2",73,73,"55脚 PD8<----->MCU_CPLD_CE"]
[2,"BANK2",76,76,"84脚 PD3<----->MCU_I2S2_CK  BCK"]
[3,"BANK2",67,67,"51脚 PB12<----->MCU_I2S2_WS  LRCK"]
[4,"BANK2",71,71,"54脚 PB15<----->MCU_I2S2_SD  DATA"]
[5,"BANK2",69,69,"53脚 PB14<----->MCU_I2S2_extSD"]
[null,"BANK2",68,68,"59脚 PD12<----->MCU_CPLD_IO1"]
[null,"BANK2",70,70,"60脚 PD13<----->MCU_CPLD_IO2"]
[null,"BANK2",72,72,"61脚 PD14<----->MCU_CPLD_IO3"]
[null,"BANK2",74,74,"62脚 PD15<----->MCU_CPLD_IO4"]
[null,"BANK2",75,75,"63脚 PC6<----->MCU_CPLD_IO5"]
[{"$nulls":4},"与PCM1789PWR"]
[6,"BANK1",18,18,"  LRCK  "]
[7,"BANK1",19,19,"  BCK"]
[8,"BANK1",20,20,"  DIN  "]
[9,"BANK1",26,26,"  MCLK_CPLD :  通过此I0 输出12.288到PCM1789PWR的SCKI管脚5  焊接R17  去掉R19"]
[]
[10,"BANK1","12脚/GCLCK0","12/GCLCK0","  MCLK:   对应CPU  ---  MCO2--PC9  12.288Mhz"]
[{"$nulls":4},"10个测试电拉出"]
[11,"BANK1",5,null,"T1"]
[12,"BANK1",7,null,"T2"]
[13,"BANK2",66,null,"T3"]
[14,"BANK1",15,null,"T4"]
[15,"BANK2",91,null,"T5"]
[16,"BANK1",50,null,"T6"]
[17,"BANK2",100,null,"T7"]
[18,"BANK1",51,null,"T8"]

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